nRF51822
Multiprotocol
Bluetooth®
4.0 low energy/2.4 GHz RF SoC
Product Specification v2.0
Key Features
• 2.4 GHz transceiver
• -93 dBm sensitivity in
Bluetooth®
low energy mode
• 250 kbps, 1 Mbps, 2 Mbps supported data rates
• TX Power -20 to +4 dBm in 4 dB steps
• TX Power -30 dBm Whisper mode
• 13 mA peak RX, 10.5 mA peak TX (0 dBm)
• RSSI (1 dB resolution)
• ARM® Cortex™-M0 32 bit processor
• 275 μA/MHz running from flash memory
• 150 μA/MHz running from RAM
• Serial Wire Debug (SWD)
• S100 series SoftDevice ready
• Memory
• 256 kB or128 kB embedded flash program memory
• 16 kB RAM
• Support for non-concurrent multiprotocol operation
• On-air compatibility with nRF24L series
• Flexible Power Management
• Supply voltage range 1.8 V to 3.6 V
• 2.5 μs wake-up using 16 MHz RCOSC
• 0.6 μA at 3 V OFF mode
• 1.2 μA at 3 V in OFF mode + 1 region RAM retention
• 2.6 μA at 3 V ON mode, all blocks IDLE
• 8/9/10 bit ADC - 8 configurable channels
• 31 General Purpose I/O Pins
• One 32 bit and two 16 bit timers with counter mode
• SPI Master/Slave
• Low power comparator
• Temperature sensor
• Two-wire Master (I2C compatible)
• UART (CTS/RTS)
• CPU independent Programmable Peripheral Interconnect (PPI)
• Quadrature Decoder (QDEC)
• AES HW encryption
• Real Timer Counter (RTC)
• Package variants
• QFN48 package, 6 x 6 mm
• WLCSP package, 3.50 x 3.83 mm
Applications
• Computer peripherals and I/O devices
• Mouse
• Keyboard
• Multi-touch trackpad
• Interactive entertainment devices
• Remote control
• 3D Glasses
• Gaming controller
• Personal Area Networks
• Health/fitness sensor and monitor
devices
• Medical devices
• Key-fobs + wrist watches
• Remote control toys
Copyright © 2013 Nordic Semiconductor ASA. All rights reserved.
Reproduction in whole or in part is prohibited without the prior written permission of the copyright holder.
nRF51822 Product Specification v2.0
Liability disclaimer
Nordic Semiconductor ASA reserves the right to make changes without further notice to the product to
improve reliability, function or design. Nordic Semiconductor ASA does not assume any liability arising out
of the application or use of any product or circuits described herein.
Life support applications
Nordic Semiconductor’s products are not designed for use in life support appliances, devices, or systems
where malfunction of these products can reasonably be expected to result in personal injury. Nordic
Semiconductor ASA customers using or selling these products for use in such applications do so at their
own risk and agree to fully indemnify Nordic Semiconductor ASA for any damages resulting from such
improper use or sale.
Contact details
For your nearest distributor, please visit
www.nordicsemi.com.
Information regarding product updates, downloads, and technical support can be accessed through your
My Page account on our home page.
Main office:
Otto Nielsens veg 12
7052 Trondheim
Norway
Phone: +47 72 89 89 00
Fax: +47 72 89 89 89
Mailing address:
Nordic Semiconductor
P.O. Box 2336
7004 Trondheim
Norway
RoHS and REACH statement
Nordic Semiconductor's products meet the requirements of Directive 2002/95/EC of the European
Parliament and of the Council on the Restriction of Hazardous Substances (RoHS) and the requirements of
the REACH regulation (EC 1907/2006) on Registration, Evaluation, Authorization and Restriction of
Chemicals. The SVHC (Substances of Very High Concern) candidate list is continually being updated.
Complete hazardous substance reports, material composition reports and latest version of Nordic's REACH
statement can be found on our website
www.nordicsemi.com.
Page 2
nRF51822 Product Specification v2.0
Datasheet Status
Status
Objective Product Specification (OPS)
Preliminary Product Specification (PPS)
Description
This product specification contains target specifications for product
development.
This product specification contains preliminary data; supplementary data
may be published from Nordic Semiconductor ASA later.
This product specification contains final product specifications. Nordic
Semiconductor ASA reserves the right to make changes at any time
without notice in order to improve design and supply the best possible
product.
Product Specification (PS)
Page 3
nRF51822 Product Specification v2.0
Revision History
Date
Version
Description
This version of the document will target the nRF51822 QFAA G0 revision of
the chip. If you are working with a previous revision of the chip, read version
1.3 or earlier of the document.
Updated
the following sections:
Key Feature list on the front page,
Chapter 1 “Introduction”
on page 8,
Section 2.1 “Block diagram”
on page 9,
Section 2.2 “Pin assignments and functions”
on page 10,
Section 3.2 “Memory”
on page 16,
Section 3.5 “Programmable Peripheral Interconnect (PPI)”
on page 19,
Section 3.7 “GPIO”
on page 23,
Section 4.1 “2.4 GHz radio (RADIO)”
on page 24,
Section 4.2 “Timer/counters (TIMER)”
on page 25,
Section 4.3 “Real Time Counter (RTC)”
on page 25,
Section 4.10 “Serial Peripheral Interface (SPI/SPIS)”
on page 27,
Section 4.12 “Universal Asynchronous Receiver/Transmitter (UART)”
on
page 28,
Section 4.14 “Analog to Digital Converter (ADC)”
on page 28,
Section 4.15 “GPIO Task Event blocks (GPIOTE)”
on page 28,
Chapter 5 “Instance table”
on page 29,
Chapter 6 “Absolute maximum ratings”
on page 30,
Chapter 8 “Electrical specifications”
on page 32,
Section 8.1 “Clock sources”
on page 32,
Section 8.1.2 “16 MHz crystal oscillator (16M XOSC)”
on page 33,
Section 8.1.3 “32 MHz crystal oscillator (32M XOSC)”
on page 34,
Section 8.2 “Power management”
on page 37,
Section 8.3 “Block resource requirements”
on page 39,
Section 8.7 “Universal Asynchronous Receiver/Transmitter (UART)
specifications”
on page 45,
Section 8.9 “Serial Peripheral Interface (SPI) Master specifications”
on
page 47,
Section 8.11 “GPIO Tasks and Events (GPIOTE) specifications”
on page 49,
Section 8.13 “Timer (TIMER) specifications”
on page 50,
Section 8.16 “Random Number Generator (RNG) specifications”
on page 50,
Section 8.17 “AES Electronic Codebook Mode Encryption (ECB) specifications”
on page 51,
Section 8.18 “AES CCM Mode Encryption (CCM) specifications”
on page 51,
Section 8.19 “Accelerated Address Resolver (AAR) specifications”
on page 51,
Section 8.21 “Quadrature Decoder (QDEC) specifications”
on page 52,
Section 11.1 “PCB guidelines”
on page 59,
Section 11.2 “QFN48 package”
on page 60, and
Section 11.3 “WLCSP package”
on page 66.
Added
the following sections:
Section 3.3 “Memory Protection Unit (MPU)”
on page 17,
Section 4.5 “AES CCM Mode Encryption (CCM)”
on page 25,
Section 4.6 “Accelerated Address Resolver (AAR)”
on page 26,
Section 4.16 “Low Power Comparator (LPCOMP)”
on page 28,
Section 8.5.6 “Antenna matching network requirements”
on page 44,
Section 8.8 “Serial Peripheral Interface Slave (SPIS) specifications”
on page 46,
Section 8.18 “AES CCM Mode Encryption (CCM) specifications”
on page 51,
Section 8.19 “Accelerated Address Resolver (AAR) specifications”
on page 51,
and
Section 8.24 “Low Power Comparator (LPCOMP) specifications”
on
page 53.
October 2013
2.0
Page 4
nRF51822 Product Specification v2.0
Date
May 2013
Version
1.3
Description
Updated schematics and BOMs in section 11.3 on page 61.
Added chip variant nRF51822-CEAA. Updated feature list on front page.
Updated
Section 3.2.1 on page 15, Section 3.2.2 on page 15, Chapter 6 on page 28,
Section 10.4 on page 52, and Section 10.5.1 on page 53.
Added
Section 2.2.2 on page 10, Section 7.1 on page 29, Section 9.2 on page 50,
and Section 11.3 on page 61.
Removed
PCB layouts in Chapter 11 on page 54.
Added chip variant nRF51822-QFAB. Added 32 MHz crystal oscillator feature.
Updated feature list on front page. Moved subsection ‘Calculating current
when the DC/DC converter is enabled’ from chapter 8 to the
nRF51 Series
Reference Manual.
Updated
Chapter 1 on page 6, Section 2.2 on page 8, Section 3.2 on page 12,
Section 3.5 on page 16, Section 3.5.1 on page 17, Section 4.2 on page 21,
Chapter 5 on page 24, Section 8.1 on page 27, Section 8.1.2 on page 28,
Section 8.1.5 on page 30, Section 8.2 on page 32, Section 8.3 on page 34,
Section 8.5.3 on page 36, Section 8.8 on page 40, Section 8.9 on page 41,
Section 8.10 on page 42, Section 8.14 on page 43, Chapter 10 on page 47,
Section 11.2 on page 51, Section 11.3 on page 54, and
Section 11.4 on page 57.
Added
Section 3.5.4 on page 19, Section 8.1.3 on page 29, and
Section 11.1 on page 50.
Changed from PPS to PS. Updated the feature list on the front page.
Updated
Table 11 on page 25, Table 12 on page 26, Table 14 on page 28,
Table 15 on page 28, Table 16 on page 29, Table 17 on page 29,
Table 18 on page 30, Table 19 on page 31, Table 21 on page 32,
Table 22 on page 32, Table 23 on page 33,Table 27 on page 36,
Table 28 on page 37, Table 29 on page 37, Table 31 on page 38,
Table 32 on page 38, Table 35 on page 39, Table 38 on page 40,
Table 39 on page 40, Table 55 on page 47, Figure 9 on page 48, and
Table 57 on page 50.
April 2013
1.2
March 2013
1.1
November 2012
1.0
Page 5
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