89HT0832P
Signal Retimer
Integrated DeviceTechnology
Integrated DeviceTechnology
ANALOG AND RF
|
FEATURES
• High Performance Retimer
– Fullly complies with new PCIe 3.0 link
equalization procedure
– Eliminates random input jitter (R
J
)
– Eliminates deterministic ISI jitter (D
J
)
– Compensates for PCB trace and cable attenuations
– Performance and power tunable for each data rate
– Multi-stage RX equalizer: CTLE and 5 tap DFE
– 4-tap TX FIR filter implement boost, preshoot and
deemphasis fully compliant with PCIe 3:0 standard
– Wide swing, transmit driver offers up to 8dB of transmi
deemphasis to meet the needs of the most challenging
of backplanes
• PCIe Standards and Compatibility
– PCI Express Base Specification 3.0 compliant
– PCI Express Base Specification 2.1 compliant
• Power Management
– Low power
– Supports the following optional PCI Express features
• L0s ASPM
• L1 ASPM
• Hot Plug Support
• SerDes Power Savings
– Supports low swing (half-swing) SerDes operation
– SerDes associated with unused lanes are placed in
a low power state automatically
• Link Configurability
– Links can be configured as 1x16, 2x8, 4x4, 1x8 & 2x4
– Automatic per port link width negotiation (e.g., a x16 port
can link train to x16, x8, x4, or x1)
– Per-lane SerDes configuration
• Clocking
– Uses standard 100 MHz PCIe reference clock
– SSCLK (Spread Spectrum Clocking) supported with
common clock configuration
– Non-SSCLK supported with common and
non-common clock configuration
2
• I C Interface
– Dedicated master interface
• External EEPROM configuration loading
– Dedicated slave interface
• Configuration loading
• Writing new or initial image into external EEPROM
• Expose internal global CSR space to system controller
• Reliability, Availability and Serviceability (RAS)
– Physical layer error checking and accounting
– End-to-end data path parity protection
– Checksum Serial EEPROM content protected
• Test and Debug
– All registers accessible from I
2
C, or JTAG port
– Supports IEEE 1149.6 AC JTAG and IEEE 1149.1 JTAG
– SERDES Rx eye generation (on-chip)
– Several loopback modes
– Pattern generator/checker
• Packaged in a 20x13mm, 345-pin CABGA,
0.8mm ball spacing
32
Channel PCIe
®
Signal Retimers for
8.0Gbps, 5.0Gbps
and
2.5Gbps
|
MEMORY AND LOGIC
|
POWER MANAGEMENT
|
TIMING AND SYNCHRONIZATION
INTERFACE AND CONNECTIVITY
IDT PCIe 3.0 Retimer/Equalizer
RX
P
RX
N
Clock
RX
EQ &
DFE
Digital
Command
Control
EQ
TX
FIR
TX
P
TX
N
General Description
The 89HT0832P (T0832P) is a Signal Retimer/Conditioner used to improve signal integrity
for enhancing system performance and reliability across long PCB traces or cables. It
removes both random and deterministic jitter from the input signal eliminating inter-symbol
interference, and resets the output jitter budget. The new PCIe 3.0 equalization procedure is
fully supported, including phase 2 and 3, on both channel segments. The T0832P provides 32
differential, 8Gbps PCIe Express
®
3.0 channels, supporting up to 16 full lanes. The Retimer
also fully supports PCIe Express 5Gbps and 2.5Gbps features. The T0832P is targeted to meet
the high-performance needs of PCIe
®
Gen 3/2/1 applications.
Applications
IDT’s Retimer products fit into server, storage, blade and communication products.
T
0832
P System Diagram
CPU
x16-lanes
8G PCIe 3.0
89HT0832P
Retimer
x16-lanes
8G PCIe 3.0
89HT0832P
Retimer
IO/NTB-CPU
x16-lanes
8G PCIe 3.0
CPU Board
Backplane
IO/CPU Board
DISCLAIMER Integrated Device Technology, Inc. (IDT) and its subsidiaries reserve the right to modify the products and/or specifications described herein at any time and at IDT’s sole discretion. All information in this document, including descriptions of product features and performance, is subject to change without notice. Performance specifications and the operating parameters
of the described products are determined in the independent state and are not guaranteed to perform the same way when installed in customer products. The information contained herein is provided without representation or warranty of any kind, whether express or implied, including, but not limited to, the suitability of IDT’s products for any particular purpose, an implied
warranty of merchantability, or non-infringement of the intellectual property rights of others. This document is presented only as a guide and does not convey any license under intellectual property rights of IDT or any third parties. IDT’s products are not intended for use in life support systems or similar devices where the failure or malfunction of an IDT product can be reasonably
expected to significantly affect the health or safety of users. Anyone using an IDT product in such a manner does so at their own risk, absent an express, written agreement by IDT.
Integrated Device Technology, IDT and the IDT logo are registered trademarks of IDT. Other trademarks and service marks used herein, including protected names, logos and designs, are the property of IDT or their respective third party owners. © Copyright 2013. All rights reserved.
IDT
|
THE ANALOG + DIGITAL COMPANY
89
HT
0832
P PRODUCT BRIEF
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