ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
Available in SSOP, TSSOP, and TVSOP Packages
Hot insertion capability
Very low power dissipation
DESCRIPTION:
The FST163233 belongs to IDT's family of Bus switches. Bus switch
devices perform the function of connecting or isolating two ports without
providing any inherent current sink or source capability. Thus they
generate little or no noise of their own while providing a low resistance path
for an external driver. These devices connect input and output ports through
an n-channel FET. When the gate-to-source junction of this FET is
adequately forward-biased the device conducts and the resistance be-
tween input and output ports is small. Without adequate bias on the gate-
to-source junction of the FET, the FET is turned off, therefore with no V
CC
applied, the device has hot insertion capability.
The low on-resistance and simplicity of the connection between input and
output ports reduces the delay in this path to close to zero.
The FST163233 provides three 16-bit TTL-compatible ports that sup-
port 2:1 multiplexing. The SEL
0,1
and TEST
0,1
pins provide switch enable
and mux select control as shown below.
The A port can be connected to port 1B or port 2B or both ports 1B and
2B.
FUNCTIONAL BLOCK DIAGRAM
SEL0
TEST0
SEL1
TEST1
0A
1
-
8
2B
1
-
8
1A
9
-
16
2B
9
-
16
1B
1
-
8
One of 16 Channels
One of 16 Channels
1B
9
-
16
INDUSTRIAL TEMPERATURE RANGE
1
c /-
1999
Integrated Device Technology, Inc.
OCTOBER 1999
DSC-5517/-
IDT74FST163233
16-BIT 2:1 MUX/DEMUX SWITCH
INDUSTRIAL TEMPERATURE RANGE
PIN CONFIGURATION
0A
1
1B
2
2B
2
0A
3
1B
4
2B
4
0A
5
1B
6
2B
6
0A
7
1B
8
2B
8
GND
V
CC
1A
9
1B
10
2B
10
1A
11
1B
12
2B
12
1A
13
1B
14
2B
14
1A
15
1B
16
2B
16
TEST
0
TEST
1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
SO56-1
SO56-2
SO56-3
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
1B
1
2B
1
0A
2
1B
3
2B
3
0A
4
1B
5
2B
5
0A
6
1B
7
2B
7
0A
8
GND
V
CC
1B
9
2B
9
1A
10
1B
11
2B
11
1A
12
1B
13
2B
13
1A
14
1B
15
2B
15
1A
16
SEL
0
SEL
1
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
V
TERM(2)
T
STG
I
OUT
Rating
Terminal Voltage with Respect to GND
Storage Temperature
Maximum Continuous Channel Current
Max.
–0.5 to +7
–65 to +150
128
Unit
V
°C
mA
FST LINK
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these or
any other conditions above those indicated in the operational sections
of this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect reliability.
2. Vcc, Control, and Switch terminals.
CAPACITANCE
(1)
Symbol
Parameter
C
IN
Control Input Capacitance
C
I/O
C
I/O
Switch Input/Output
Capacitance, A Port
Switch Input/Output
Capacitance, B Port
Conditions
(2)
Switch Off
Switch Off
Typ.
6
17
12
Unit
pF
pF
pF
NOTES:
1. Capacitance is characterized but not tested.
2. T
A
= 25°C, f = 1MHz, V
IN
= 0V, V
OUT
= 0V
PIN DESCRIPTION
Pin Names
A, 1B, 2B
SEL
0-1,
TEST
0-1
I/O
I/O
I
Description
Buses A, 1B, 2B
Control Pins for Mux and Switch Enable
Functions
FUNCTION TABLE
SEL
0
L
H
X
SEL
1
L
H
X
(1)
Function
0A to 1B
0A to 2B
0A to 1B and
0A to 2B
Function
1A to 1B
1A to 2B
1A to 1B and
1A to 2B
TEST
0
L
L
H
TEST
1
L
L
H
SSOP/ TSSOP/ TVSOP
TOP VIEW
NOTE:
1. H = HIGH Voltage level
L = LOW Voltage Level
X = Don’t Care
2
IDT74FST163233
16-BIT 2:1 MUX/DEMUX SWITCH
INDUSTRIAL TEMPERATURE RANGE
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Operating Conditions: T
A
= -40°C to +85°C, V
CC
= 5.0V ±10%
Symbol
V
IH
V
IL
I
IH
I
IL
I
OZH
I
OZL
V
IK
I
OFF
I
CC
Parameter
Control Input HIGH Voltage
Control Input LOW Voltage
Control Input HIGH Current
Control Input LOW Current
Current during
Bus Switch DISCONNECT
Clamp Diode Voltage
Switch Power Off Leakage
Quiescent Power Supply Current
V
CC
= Min., I
IN
= –18mA
V
CC
= 0V, V
IN
or V
O
≤
5.5V
V
CC
= Max., V
IN
= GND or V
CC
V
CC
= Max., V
O
= 0 to 5V
Test Conditions
Guaranteed Logic HIGH for Control Inputs
Guaranteed Logic LOW for Control Inputs
V
CC
= Max.
V
I
= V
CC
V
I
= GND
Min.
2
—
—
—
—
—
—
—
—
Typ.
(1)
—
—
—
—
—
—
–0.7
—
0.1
Max.
—
0.8
±1
±1
±1
±1
–1.2
±1
3
V
µA
µA
FST LINK
Unit
V
V
µA
µA
BUS SWITCH IMPEDANCE OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Operating Conditions: T
A
= -40°C to +85°C, V
CC
= 5.0V ±10%
Symbol
R
ON
Parameter
Switch On Resistance
(2)
Test Conditions
Vcc = Min., V
IN
= 0V
I
ON
= 12mA
Vcc = Min., V
IN
= 2.4V
I
ON
= 8mA
A(B) = 0V, B(A) = V
CC
Min.
—
—
100
Typ.
(1)
5
10
—
Max.
7
15
—
Unit
Ω
Ω
mA
I
OS
Short Circuit Current, A to B
(3)
NOTES:
1. Typical values are at Vcc = 5.0V, +25°C ambient.
2. The voltage drop between the indicated ports divided by the current through the switch.
3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.
3
IDT74FST163233
16-BIT 2:1 MUX/DEMUX SWITCH
INDUSTRIAL TEMPERATURE RANGE
POWER SUPPLY CHARACTERISTICS
Symbol
∆I
CC
I
CCD1
Parameter
Quiescent Power Supply Current
TTL Inputs HIGH
Dynamic Power Supply Current
(4, 5)
Test Conditions
(1)
V
CC
= Max.
V
IN
= 3.4V
(3)
V
CC
= Max.
One Select Pin Toggling
50% Duty Cycle
V
CC
= Max.
One Test Pin Toggling
50% Duty Cycle
V
CC
= Max.
One Select Pin Toggling
fi = 10MHz
50% Duty Cycle
V
CC
= Max.
2 Select Pins Toggling
fi = 10MHz
50% Duty Cycle
Min.
—
—
Typ.
(2)
0.5
30
Max.
1.5
40
Unit
mA
µ A/
MHz/
Select
µ A/
MHz/
Test
mA
V
IN
= V
CC
V
IN
= GND
V
IN
= V
CC
V
IN
= GND
V
IN
= V
CC
V
IN
= GND
V
IN
= 3.4V
V
IN
= GND
V
IN
= V
CC
V
IN
= GND
V
IN
= 3.4V
V
IN
= GND
I
CCD2
Dynamic Power Supply Current
(4, 5)
—
120
160
I
C
Total Power Supply Current
(6)
—
—
—
—
0.3
0.6
0.6
1.1
0.4
1.2
0.8
2.3
mA
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. T
A
= –40°C to
+85°C
2. Typical values are at V
CC
= 5.0V, +25°C ambient.
3. Per TTL driven input (V
IN
= 3.4V). All other inputs at V
CC
or GND. Switch inputs do not contribute to
∆I
CC.
4. This parameter represents the current required to switch the internal capacitance of the control inputs at the specified frequency. Switch inputs generate
no significant power supply currents as they transition. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. C
PD
= I
CCD
/V
CC
C
PD
= Power Dissipation Capacitance
6. I
C
= I
QUIESCENT
+ I
INPUTS
+ I
DYNAMIC
I
C
= I
CC
+
∆I
CC
D
H
N
T
+ I
CCD
(f
i
N)
I
CC
= Quiescent Current
∆I
CC
= Power Supply Current for a TTL High Input (V
IN
= 3.4V)
D
H
= Duty Cycle for TTL Inputs High
N
T
= Number of TTL Inputs at D
H
I
CCD
= Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
f
i
= Control Input Frequency
N = Number of Control Inputs Toggling at f
i
4
IDT74FST163233
16-BIT 2:1 MUX/DEMUX SWITCH
INDUSTRIAL TEMPERATURE RANGE
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Operating Conditions: T
A
= -40°C to +85°C, V
CC
= 5.0V ±10%
V
CC
= 5V ± 10%
Symbol
t
PLH
t
PHL
t
BX
t
PZH
t
PZL
t
PHZ
t
PLZ
|Q
CI
|
|Q
DCI
|
Description
(1)
Data Propagation Delay
A to B, B to A
(2)
Switch Multiplex Delay
SEL to A
Switch CONNECT Delay
SEL, TEST to B
Switch DISCONNECT Delay
SEL, TEST to B
Charge Injection During Switch DISCONNECT,
TEST to A or B
(3)
Differential Charge Injection During Multiplexer Switching,
SEL to A or B
(3)
Min.
—
1.5
1.5
1.5
—
—
Typ.
—
—
—
—
1.5
0.5
Max.
0.25
6.5
6.5
7
—
—
Min.
—
—
—
—
—
—
V
CC
= 4V
Max.
0.25
7
7
7
—
—
Unit
ns
ns
ns
ns
pC
pC
NOTES:
1. See test circuits and waveforms.
2. The bus switch contributes no Propagation Delay other than the RC Delay of the load interacting with the RC of the switch.
3. |Q
CI
| is the charge injection for a single switch DISCONNECT and applies to either single switches or multiplexers.
|Q
DCI
| is the charge injection for a multiplexer as the multiplexed port switches from one path to another. Charge injection is reduced because the
injection from the DISCONNECT of the first path is compensated by the CONNECT of the second path.
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