Integrated
measurement
engine, Ethernet
and LCD
Kinetis K50 Family
The Kinetis MCU portfolio consists of multiple pin-, peripheral and software-compatible
MCU families based on the ARM
®
Cortex
®
-M4 core.
TARGET APPLICATIONS
}
Low-power portable medical devices
}
Clinical and lab equipment
}
Test/measurement equipment
}
Instrumentation applications
}
Monitor and telehealth applications
Kinetis MCU families are built from innovative 90 nm thin-
film storage (TFS) flash technology with unique FlexMemory
(EEPROM) capability and offer industry-leading low power
and mixed signal analog integration.
The K50 MCU family provides designers with an analog
measurement engine consisting of integrated operational and
transimpedance amplifiers as well as high-resolution ADC and
DAC modules. The family also features IEEE
®
1588 Ethernet
and hardware encryption, Full-Speed USB 2.0 On-The-Go
with device charger detect capability and a flexible low-power
segment LCD controller with support for up to 320 segments.
Devices start from 128 KB of flash in 64 QFN packages
extending up to 512 KB in a 144 MAPBGA package.
ONE-STOP ENABLEMENT OFFERING: MCU + IDE + RTOS
Tower
®
System hardware development environment:
}
TWR-K53N512-KIT ($179)
– Includes TWR-SER, TWR-ELEV and TWR-K53N512 modules
}
TWR-K53N512 ($109)
– Includes TWR-K53N512 and TWRPI-SLCD daughter card
}
Integrated development environments (IDEs)
– Eclipse-based CodeWarrior IDE and Processor Expert
– IAR Embedded Workbench
®
– ARM Keil
®
MCU development tool
– CodeSourcery Sourcery G++ (GNU)
}
Portable medical applications demo software: EKG, pulse
oximeter, blood pressure monitor, spirometer
}
Math, DSP and encryption libraries
}
Motor control libraries
}
Complimentary bootloaders
(USB, Ethernet, RF, serial)
}
Complimentary embedded GUI
}
Complimentary proprietary
MQX
™
RTOS
}
Cost-effective Nano
™
SSL/Nano
™
SSH for proprietary MQX RTOS
}
Micrium µC/OS-III
}
Express Logic ThreadX
}
SEGGER embOS
}
FreeRTOS
}
Green Hills µ-velOSity
}
Mocana (security)
}
Full ARM ecosystem
}
Reduces core interruption,
increasing performance
}
Design flexibility and system
cost reduction
}
Increases system safety by
restricting access to key
memory locations
}
Provides scalability needed for
key digital power and motor
control applications
KINETIS K50
Family
Kinetis K50
FAMILY
Core
ARM
®
Cortex
®
-M4
72/100 MHz
Debug
Interfaces
Interrupt
Controller
DSP
System
Internal and
External
Watchdogs
Memory
Protection Unit
(MPU)
DMA
Low-Leakage
Wake-Up Unit
Program
Flash
(128 to 512 KB)
FlexMemory
(32 to 256 KB)
(2 to 4 KB EE)
Serial
Programming
Interface
(EZPort)
Memories
SRAM
(32 to 128 KB)
External
Bus Interface
(FlexBus)
Clocks
Phase-Locked
Loop
Frequency-
Locked Loop
Low/High-
Frequency
Oscillators
Internal
Reference
Clocks
Security
and Integrity
Cyclic
Redundancy
Check (CRC)
Random
Number
Generator
Cryptographic
Acceleration
Unit (CAU)
Analog
16-bit
ADC
PGA
Analog
Comparator
6-bit
DAC
12-bit
DAC
Voltage
Reference
OPAMP
TRIAMP
Timers
FlexTimer
Carrier
Modulator
Transmitter
Programmable
Delay Block
Periodic
Interrupt
Timer
Low-Power
Timer
Independent
Real-Time
Clock (IRTC)
IEEE
®
1588
Timer
Communication Interfaces
I
2
C
UART
(ISO 7816)
SPI
I
2
S
Secure
Digital Host
Controller
(SDHC)
USB OTG
(LS/FS)
USB Charger
Detect (DCD)
IEEE 1588
Ethernet MAC
USB Voltage
Regulator
HMI
GPIO
Low-Power
Touch-Sensing
Interface
Segment
LCD Controller
Optional
Features
• ARM
®
Cortex
®
-M4 core with DSP
instruction support
• Up to 16-channel DMA and crossbar switch
• Up to 2 x 16-bit ADC with PGA
• Up to 2 x 12-bit DAC
• Programmable delay block
• Operational and transimpedance amplifiers
• Voltage reference (VREF)
• IEEE
®
1588 Ethernet MAC with hardware
time stamping
• Hardware encryption coprocessor
• USB On-The-Go (Full-Speed) with device
charger detect
• Flexible, low-power LCD controller
with support for up to 320 segments
(40 x 8 or 44 x 4)
Benefits
• Up to 100 MHz core supporting a broad range of processing bandwidth needs
• Peripheral and memory servicing with reduced CPU loading. Concurrent multi-master bus accesses for increased
bus bandwidth
• High-resolution and high-accuracy ADC provides accurate signal acquisition
• Digital-to-analog converter with clock gating optimized for low-power usage
• PDB precisely triggers ADC and DAC blocks to complete sensor biasing and measurement (i.e. glucometry strips)
• OPAMPS allow signal filtering and amplification, TRIAMPS are optimized for converting current inputs into voltages
that can be read by the ADC
• VREF allows enhanced accuracy by supplying analog peripherals with fixed reference
• Precision clock synchronization for real-time networked industrial automation
and control
• Secure data transfer and storage. Faster than software implementations and with minimal CPU loading. Supports
a wide variety of algorithms
• Optimized charging current/time for portable USB devices enabling longer battery life USB low-voltage regulator
supplies up to 120 mA off chip at 3.3 V to power external components from 5 V input
• LCD blink mode enables low average power while remaining in low-power mode
• Segment fail detect guards against erroneous readouts and reduces LCD test costs
• Frontplane/backplane reassignment provides pin-out flexibility easing PCB design and allows LCD configuration
changes via firmware with no hardware re-work
• Supports multiple 3 V and 5 V LCD panel sizes with fewer segments (pins) than competitive controllers and
no external components
• Unused LCD pins can be configured as other GPIO functions
• FlexBus external bus interface and secure
digital host controller
• 128–512 KB flash. Up to 128 KB of SRAM
• 32–256 KB FlexMemory
• Enables the connection of external memories and peripherals (e.g., graphics displays)
• Connection to SD, SDIO, MMC or CE-ATA cards for in-application software upgrades, file systems or adding
Wi-Fi
®
or Bluetooth
®
support
• High reliability, fast access program memory with 4-level security protection
• Independent flash banks allow concurrent code execution and firmware updating
• FlexMemory provides 2–4 KB of user-segmentable byte write/erase EEPROM. In addition, Flex NVM from
32–256 KB for extra program code, data or EEPROM backup
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