Performance Specifications
Parameter
Min
Typ
Max
Units
Condition
t
Supply Voltage (Vs)
VDC
VDC
VDC
Frequency Output vs Current Consumption
(by supply voltage and output logic)
Current Consumption (mA)
120
100
80
60
40
20
0
1
15
24
40
50
60
85
125 <200 >200
Frequency Output (MHz)
+5V
ACMOS\TTL
+3.3V
ACMOS
+3.3V\+2.5V
LVPECL\LVDS
2 of 9
Performance Specifications
Parameter
Min
Typ
Max
ACMOS
VDC
VDC
VDC
VDC
VDC
VDC
ns
ns
ns
Units
RF Output
Condition
TTL
4
+
TTL
VDC
VDC
ns
ns
LVPECL
into Vcc-2V or There in Equivalent
Vs
VDC
VDC
-40....+85°C operating temp
-40....+85°C operating temp
BW = 12KHz to 20 MHz
LVDS
VDC
VDC
V
3 of 9
Recommended Reflow Profiles for Pb-Free & Sn-Pb
tp
T
p
Ramp up
Ts
Critical Zone
T
L
to T
p
T
L
Temperature
t
L
Ramp dow n
Ts
ts
preheat
25
t 25°C to peak
Time
230°C Reflow Profile
W
&
^ W
3°C/seconds max.
135°C
155°C
60-90 seconds
W
&
^ W
4 minutes max.
Average ramp-up rate (TL to TP)
Preheat - Temperature min Tsmin
- Temperature Min Tsmax
- Time (min to max) (ts)
Tsmax to TL -Ramp-up Rate
Time maintained above - Temperature (TL)
- Time (TL)
Peak Temperature (Tp)
E
Time 25°C to Peak Temperature
Time maintained above
- Temperature (TL)
183°C
45-60 seconds
Standard Shipping Method
- Time (tL)
Time within 5°C of actual
Peak Temperature (tp)
Ramp-down Rate
3°C/seconds max.
183°C
40-60 seconds
max 230°C
10-20 seconds max.
6°C/seconds max.
All temperatures refer to topside of the package, measured on the package body surface.
260°C Reflow Profile
W
&
W &
3°C/seconds max.
150°C
200°C
60-180 seconds
3°C/seconds max.
217°C
60-150 seconds
max 260°C
Time within 5°C of actual
Peak Temperature (tp)
Ramp-down Rate
6°C/seconds max.
20-40 seconds max.
W
&
W &
8 minutes max.
Average ramp-up rate (TL to TP)
Preheat - Temperature min Tsmin
- Temperature min Tsmax
- Time (min to max) (ts)
Tsmax to TL -Ramp-up Rate
Time maintained above - Temperature (TL)
- Time (TL)
Peak Temperature (Tp)
E
Time 25°C to Peak Temperature
Time maintained above
- Temperature (TL)
- Time (tL)
217°C
60-150 seconds
All temperatures refer to topside of the package, measured on the package body surface.
5 of 9
PCB设计
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
