LTC1410
12-Bit, 1.25Msps Sampling
A/D Converter with Shutdown
FEATURES
s
s
s
s
s
s
DESCRIPTIO
s
s
s
s
1.25Msps Sample Rate
Power Dissipation: 160mW
71dB S/(N + D) and 82dB THD at Nyquist
No Pipeline Delay
Nap (7mW) and Sleep (10µW) Shutdown Modes
Operates with Internal 15ppm/°C Reference
or External Reference
True Differential Inputs Reject Common Mode Noise
20MHz Full Power Bandwidth Sampling
±2.5V
Bipolar Input Range
28-Pin SO Wide Package
The LTC
®
1410 is a 0.65µs, 1.25Msps, 12-bit sampling
A/D converter that draws only 160mW from
±5V
supplies.
This easy-to-use device includes a high dynamic range
sample-and-hold, a precision reference and requires no
external components. Two digitally selectable power shut-
down modes provide flexibility for low power systems.
The LTC1410’s full-scale input range is
±2.5V.
Maximum
DC specifications include
±1LSB
INL and
±1LSB
DNL over
temperature. Outstanding AC performance includes 71dB
S/(N + D) and 82dB THD at the Nyquist input frequency of
625kHz.
The unique differential input sample-and-hold can acquire
single-ended or differential input signals up to its 20MHz
bandwidth. The 60dB common mode rejection allows
users to eliminate ground loops and common mode noise
by measuring signals differentially from the source.
The ADC has a
µP
compatible, 12-bit parallel output port.
There is no pipeline delay in the conversion results. A
separate convert start input and a data ready signal (BUSY)
ease connections to FIFOs, DSPs and microprocessors.
, LTC and LT are registered trademarks of Linear Technology Corporation.
APPLICATI
s
s
s
s
s
s
S
Telecommunications
Digital Signal Processing
Multiplexed Data Acquisition Systems
High Speed Data Acquisition
Spectrum Analysis
Imaging Systems
TYPICAL APPLICATI
Complete 1.25MHz, 12-Bit Sampling A/D Converter
LTC1410
DIFFERENTIAL 1
AV
DD
+A
IN
ANALOG INPUT
(–2.5V TO 2.5V) 2
–A
IN
DV
DD
2.50V 3 V
V
SS
V
REF
OUTPUT 4
REF
REFCOMP
BUSY
5
0.1µF
AGND
CS
6
D11(MSB) CONVST
7
D10
RD
8
D9
SHDN
9
D8
NAP/SLP
10
D7
OGND
11
12-BIT
D6
D0
PARALLEL
12
D5
D1
BUS
13
D4
D2
14
DGND
D3
5V
28
27
26
25
24
23
22
21
20
19
18
17
16
15
µP
CONTROL
LINES
10µF
–5V
Effective Bits and Signal-to-(Noise + Distortion)
vs Input Frequency
12
74
68
10
8
6
4
2
0
1k
f
SAMPLE
= 1.25MHz
10k
100k
1M
INPUT FREQUENCY (Hz)
10M
LTC1410 • TA02
+
10µF
0.1µF
EFFECTIVE BITS
0.1µF
+
10µF
1410 TA01
U
NYQUIST
62
56
50
S/(N + D) (dB)
UO
UO
1
LTC1410
ABSOLUTE
AXI U
RATI GS
PACKAGE/ORDER I FOR ATIO
TOP VIEW
+A
IN
1
–A
IN
2
V
REF
3
REFCOMP 4
AGND 5
D11(MSB) 6
D10 7
D9 8
D8 9
D7 10
D6 11
D5 12
D4 13
DGND 14
G PACKAGE
28-LEAD PLASTIC SSOP
28 AV
DD
27 DV
DD
26 V
SS
25 BUSY
24 CS
23 CONVST
22 RD
21 SHDN
20 NAP/SLP
19 OGND
18 D0
17 D1
16 D2
15 D3
SW PACKAGE
28-LEAD PLASTIC SO WIDE
AV
DD
= DV
DD
= V
DD
(Notes 1, 2)
Supply Voltage (V
DD
) ................................................ 6V
Negative Supply Voltage (V
SS
) ............................... – 6V
Total Supply Voltage (V
DD
to V
SS
) .......................... 12V
Analog Input Voltage
(Note 3) .................................. V
SS
– 0.3V to V
DD
+ 0.3V
Digital Input Voltage (Note 4) ............ V
SS
– 0.3V to 10V
Digital Output Voltage ................... – 0.3V to V
DD
+ 0.3V
Power Dissipation ............................................. 500mW
Operating Temperature Range
LTC1410C .............................................. 0°C to 70°C
LTC1410I ........................................... – 40°C to 85°C
Storage Temperature Range ................ – 65°C to 150°C
Lead Temperature (Soldering, 10 sec)................. 300°C
ORDER
PART NUMBER
LTC1410CG
LTC1410CSW
LTC1410IG
LTC1410ISW
T
JMAX
= 110°C,
θ
JA
= 90°C/W (SW)
T
JMAX
= 110°C,
θ
JA
= 95°C/W (G)
Consult factory for Military grade parts.
CO VERTER CHARACTERISTICS
PARAMETER
Resolution (No Missing Codes)
Integral Linearity Error
Differential Linearity Error
Offset Error
Full-Scale Error
Full-Scale Tempco
The
q
denotes specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. With Internal Reference (Notes 5, 6)
CONDITIONS
q
MIN
12
q
q
TYP
±0.3
±0.3
±2
MAX
±1
±1
±6
±8
±15
UNITS
Bits
LSB
LSB
LSB
LSB
LSB
ppm/°C
(Note 7)
(Note 8)
q
I
OUT(REF)
= 0
q
±15
A ALOG I PUT
SYMBOL PARAMETER
V
IN
I
IN
C
IN
t
ACQ
t
AP
t
jitter
CMRR
The
q
denotes specifications which apply over the full operating temperature range, otherwise
specifications are at T
A
= 25°C. (Note 5)
CONDITIONS
4.75V
≤
V
DD
≤
5.25V, – 5.25V
≤
V
SS
≤
– 4.75V
CS = High
Between Conversions
During Conversions
q
q
q
MIN
TYP
±2.5
MAX
±1
UNITS
V
µA
pF
pF
Analog Input Range (Note 9)
Analog Input Leakage Current
Analog Input Capacitance
Sample-and-Hold Acquisition Time
Sample-and-Hold Aperture Delay Time
Sample-and-Hold Aperture Delay Time Jitter
Analog Input Common Mode Rejection Ratio
17
5
50
–1.5
5
100
ps
RMS
dB
– 2.5V < (– A
IN
= A
IN
) < 2.5V
60
2
U
ns
ns
W
U
U
W W
W
U
U
U
LTC1410
DY A IC ACCURACY
SYMBOL
S/(N + D)
THD
The
q
denotes specifications which apply over the full operating temperature range,
otherwise specifications are at T
A
= 25°C. (Note 5)
PARAMETER
Signal-to-(Noise + Distortion) Ratio
Total Harmonic Distortion
Peak Harmonic or Spurious Noise
Intermodulation Distortion
Full Power Bandwidth
Full Linear Bandwidth
CONDITIONS
100kHz Input Signal (Note 12)
600kHz Input Signal (Note 12)
100kHz Input Signal, First 5 Harmonics
600kHz Input Signal, First 5 Harmonics
600kHz Input Signal
f
IN1
= 29.37kHz, f
IN2
= 32.446kHz
(S/(N + D)
≥
68dB)
q
q
q
q
IMD
I TER AL REFERE CE CHARACTERISTICS
PARAMETER
V
REF
Output Voltage
V
REF
Output Tempco
V
REF
Line Regulation
V
REF
Output Resistance
COMP Output Voltage
CONDITIONS
I
OUT
= 0
I
OUT
= 0
4.75V
≤
V
DD
≤
5.25V
– 5.25V
≤
V
SS
≤
– 4.75V
I
OUT
≤
0.1mA
I
OUT
= 0
The
q
denotes specifications which apply over the full
operating temperature range, otherwise specifications are at T
A
= 25°C. (Note 5)
MIN
2.480
TYP
2.500
±15
0.01
0.01
2
4.06
MAX
2.520
UNITS
V
ppm/°C
LSB/V
LSB/V
kΩ
V
DIGITAL I PUTS A D DIGITAL OUTPUTS
SYMBOL
V
IH
V
IL
I
IN
C
IN
V
OH
PARAMETER
High Level Input Voltage
Low Level Input Voltage
Digital Input Current
Digital Input Capacitance
High Level Output Voltage
CONDITIONS
V
DD
= 5.25V
V
DD
= 4.75V
V
IN
= 0V to V
DD
V
DD
= 4.75V
I
O
= – 10µA
I
O
= – 200µA
V
DD
= 4.75V
I
O
= 160µA
I
O
= 1.6mA
V
OUT
= 0V to V
DD
, CS High
CS High (Note 9 )
V
OUT
= 0V
V
OUT
= V
DD
The
q
denotes specifications which apply over the full
operating temperature range, otherwise specifications are at T
A
= 25°C. (Note 5)
q
q
q
V
OL
Low Level Output Voltage
I
OZ
C
OZ
I
SOURCE
I
SINK
High-Z Output Leakage D11 to D0
High-Z Output Capacitance D11 to D0
Output Source Current
Output Sink Current
POWER REQUIRE E TS
SYMBOL
V
DD
V
SS
I
DD
PARAMETER
Positive Supply Voltage
Negative Supply Voltage
Positive Supply Current
Nap Mode
Sleep Mode
Negative Supply Current
Nap Mode
Sleep Mode
The
q
denotes specifications which apply over the full operating temperature range,
otherwise specifications are at T
A
= 25°C. (Note 5)
CONDITIONS
(Notes 10, 11)
(Note 10)
CS = RD = CONVST = 5V
SHDN = 0V, NAP/SLP = 5V
SHDN = 0V, NAP/SLP = 0V
CS = RD = CONVST = 5V
SHDN = 0V, NAP/SLP = 5V
SHDN = 0V, NAP/SLP = 0V
MIN
4.75
– 4.75
q
I
SS
U W
U
U
U
W U
U
MIN
70
68
TYP
72.5
71.0
– 85
– 82
– 84
– 84
20
2.5
MAX
– 74
– 74
UNITS
dB
dB
dB
dB
dB
dB
MHz
MHz
U
MIN
2.4
TYP
MAX
0.8
±10
5
4.5
q
UNITS
V
V
µA
pF
V
V
V
V
µA
pF
mA
mA
4.0
0.05
0.10
q
q
q
0.4
±10
15
– 10
10
TYP
q
12
1.5
1
20
10
1
MAX
5.25
– 5.25
16
2.3
100
30
200
100
UNITS
V
V
mA
mA
µA
mA
µA
µA
3
LTC1410
POWER REQUIRE E TS
SYMBOL
P
D
PARAMETER
Power Dissipation
Nap Mode
Sleep Mode
The
q
denotes specifications which apply over the full operating temperature range,
otherwise specifications are at T
A
= 25°C. (Note 5)
CONDITIONS
SHDN = 0V, NAP/SLP = 5V
SHDN = 0V, NAP/SLP = 0V
MIN
TYP
160
7.5
0.01
MAX
230
12
1
UNITS
mW
mW
mW
TI I G CHARACTERISTICS
SYMBOL
f
SAMPLE(MAX)
t
CONV
t
ACQ
t
ACQ+CONV
t
1
t
2
t
3
t
4
t
5
t
6
t
7
t
8
t
9
t
10
PARAMETER
Maximum Sampling Frequency
Conversion Time
Acquisition Time
Throughput Time
(Acquisition + Conversion)
CS to RD Setup Time
CS↓ to CONVST↓ Setup Time
NAP/SLP↓ to SHDN↓ Setup Time
The
q
denotes specifications which apply over the full operating temperature
range, otherwise specifications are at T
A
= 25°C. (Note 5)
CONDITIONS
q
q
q
q
SHDN↑ to CONVST↓ Wake-Up Time (Note 10)
CONVST Low Time
(Notes 10, 11)
CONVST to BUSY Delay
Data Ready Before BUSY↑
C
L
= 25pF
Delay Between Conversions
Wait Time RD↓ After BUSY↑
Data Access Time After RD↓
t
11
Bus Relinquish Time
Commercial
Industrial
q
q
q
q
t
12
t
13
t
14
RD Low Time
CONVST High Time
Aperture Delay of Sample-and-Hold
Note 1:
Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2:
All voltage values are with respect to ground with DGND, OGND
and AGND wired together unless otherwise noted.
Note 3:
When these pin voltages are taken below V
SS
or above V
DD
, they
will be clamped by internal diodes. This product can handle input currents
greater than 100mA below V
SS
or above V
DD
without latchup.
Note 4:
When these pin voltages are taken below V
SS
, they will be clamped
by internal diodes. This product can handle input currents greater than
100mA below V
SS
without latchup. These pins are not clamped to V
DD
.
Note 5:
V
DD
= 5V, V
SS
= – 5V, f
SAMPLE
= 1.25MHz, t
r
= t
f
= 5ns unless
otherwise specified.
Note 6:
Linearity, offset and full-scale specifications apply for a single-
ended +A
IN
input with – A
IN
grounded.
4
U W
UW
MIN
1.25
TYP
650
50
MAX
750
100
800
UNITS
MHz
ns
ns
ns
ns
ns
ns
(Notes 9, 10)
(Notes 9, 10)
(Notes 9, 10)
q
q
q
q
q
q
0
10
10
200
40
10
50
20
15
40
–5
15
25
35
35
50
20
25
30
35
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
(Note 10)
(Note 10)
C
L
= 25pF
q
q
q
C
L
= 100pF
q
20
8
t
10
40
– 1.5
Note 7:
Integral nonlinearity is defined as the deviation of a code from a
straight line passing through the actual endpoints of the transfer curve.
The deviation is measured from the center of the quantization band.
Note 8:
Bipolar offset is the offset voltage measured from – 0.5LSB when
the output code flickers between 0000 0000 0000 and 1111 1111 1111.
Note 9:
Guaranteed by design, not subject to test.
Note 10:
Recommended operating conditions.
Note 11:
The falling CONVST edge starts a conversion. If CONVST returns
high at a critical point during the conversion it can create small errors. For
best results ensure that CONVST returns high either within 425ns after the
start of the conversion or after BUSY rises.
Note 12:
Signal-to-noise ratio (SNR) is measured at 100kHz and distortion
is measured at 600kHz. These results are used to calculate signal-to-noise
plus distortion (SINAD).
LTC1410
TYPICAL PERFORMANCE CHARACTERISTICS
S/(N + D) vs Input Frequency
and Amplitude
80
SIGNAL/(NOISE + DISTORTION) (dB)
70
60
50
40
30
20
10
f
SAMPLE
= 1.25MHz
0
1k
1M
10k
100k
INPUT FREQUENCY (Hz)
10M
1410 G01
AMPLITUDE (dB BELOW THE FUNDAMENTAL)
SIGNAL-TO-NOISE RATIO (dB)
V
IN
= 0dB
V
IN
= –20dB
V
IN
= –60dB
Spurious-Free Dynamic Range vs
Input Frequency
0
SPURIOUS-FREE DYNAMIC RANGE (dB)
–10
–20
–40
–50
–60
–70
–80
–90
AMPLITUDE (dB)
–40
–60
–80
–100
–120
DNL ERROR (LSB)
–30
–100
10k
100k
1M
INPUT FREQUENCY (Hz)
AMPLITUDE OF POWER SUPPLY FEEDTHROUGH (dB)
Integral Nonlinearity vs
Output Code
1.0
–20
–40
–60
–80
–100
–120
V
SS
V
DD
DGND
COMMON MODE REJECTION (dB)
0.5
INL ERROR (LSB)
0
–0.5
–1.0
0
512 1024 1536 2048 2560 3072 3504 4096
OUTPUT CODE
1410 G07
U W
1410 G04
Signal-to-Noise Ratio vs
Input Frequency
80
70
60
50
40
30
20
10
0
1k
1M
10k
100k
INPUT FREQUENCY (Hz)
10M
1410 G02
Distortion vs Input Frequency
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
1k
1M
10k
100k
INPUT FREQUENCY (Hz)
10M
1410 G03
3RD
2ND
THD
–100
Intermodulation Distortion Plot
0
–20
f
SAMPLE
= 1.25MHz
f
IN1
= 88.19580078kHz
f
IN2
= 111.9995117kHz
0.5
1.0
Differential Nonlinearity vs
Output Code
0
–0.5
10M
0
100
200
300
400
500
600
–1.0
0
FREQUENCY (kHz)
1410 G05
512 1024 1536 2048 2560 3072 3504 4096
OUTPUT CODE
1410 G06
Power Supply Feedthrough
vs Ripple Frequency
0
V
RIPPLE
= 0.1V
80
70
60
50
40
30
20
10
0
Input Common Mode Rejection
vs Input Frequency
1k
10k
100k
1M
RIPPLE FREQUENCY (Hz)
10M
1410 G08
1k
1M
10k
100k
INPUT FREQUENCY (Hz)
10M
1410 G09
5
嵌入式系统
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
