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5962F9863101VXC

产品描述8-INPUT NAND GATE, CDFP14, CERAMIC, DFP-14
产品类别逻辑    逻辑   
文件大小38KB,共2页
制造商Renesas(瑞萨电子)
官网地址https://www.renesas.com/
下载文档 详细参数 选型对比 全文预览

5962F9863101VXC概述

8-INPUT NAND GATE, CDFP14, CERAMIC, DFP-14

5962F9863101VXC规格参数

参数名称属性值
是否Rohs认证不符合
零件包装代码DFP
包装说明DFP, FL14,.3
针数14
Reach Compliance Codenot_compliant
JESD-30 代码R-CDFP-F14
JESD-609代码e0
负载电容(CL)50 pF
逻辑集成电路类型NAND GATE
最大I(ol)0.008 A
功能数量1
输入次数8
端子数量14
最高工作温度125 °C
最低工作温度-55 °C
封装主体材料CERAMIC, METAL-SEALED COFIRED
封装代码DFP
封装等效代码FL14,.3
封装形状RECTANGULAR
封装形式FLATPACK
峰值回流温度(摄氏度)NOT SPECIFIED
电源5 V
Prop。Delay @ Nom-Sup16 ns
传播延迟(tpd)16 ns
认证状态Not Qualified
施密特触发器NO
筛选级别38535V;38534K;883S
座面最大高度2.92 mm
标称供电电压 (Vsup)5 V
表面贴装YES
技术CMOS
温度等级MILITARY
端子面层Tin/Lead (Sn/Pb)
端子形式FLAT
端子节距1.27 mm
端子位置DUAL
处于峰值回流温度下的最长时间NOT SPECIFIED
总剂量300k Rad(Si) V
宽度6.285 mm
Base Number Matches1

文档预览

下载PDF文档
ACS30MS
Data Sheet
July 1999
File Number
4759
Radiation Hardened 8-Input NAND Gate
The Radiation Hardened ACS30MS is an 8-Input NAND
Gate. A HIGH level on all inputs results in a LOW level on
the Y output. A LOW level on any input results in a HIGH
level on the Y output. All inputs are buffered and the
outputs are designed for balanced propagation delay and
transition times.
The ACS30MS is fabricated on a CMOS Silicon on
Sapphire (SOS) process, which provides an immunity to
Single Event Latch-up and the capability of highly reliable
performance in any radiation environment. These devices
offer significant power reduction and faster performance
when compared to ALSTTL types.
Specifications for Rad Hard QML devices are controlled
by the Defense Supply Center in Columbus (DSCC). The
SMD numbers listed below must be used when ordering.
Detailed Electrical Specifications for the ACS30MS are
contained in SMD 5962-98631. A “hot-link” is provided
on our homepage for downloading.
http://www.intersil.com/spacedefense/spaceselect.htm
Features
• QML Qualified Per MIL-PRF-38535 Requirements
• 1.25 Micron Radiation Hardened SOS CMOS
• Radiation Environment
- Latch-Up Free Under Any Conditions
- Total Dose (Max.) . . . . . . . . . . . . . . . . . 3 x 10
5
RAD(Si)
- SEU Immunity . . . . . . . . . . . . . <1 x 10
-10
Errors/Bit/Day
- SEU LET Threshold . . . . . . . . . . . . >100MeV/(mg/cm
2
)
• Input Logic Levels. . . . V
IL
= (0.3)(V
CC
), V
IH
= (0.7)(V
CC
)
• Output Current
. . . . . . . . . . . . . . . . . . . . . . . . . . ±12mA
(Min)
• Quiescent Supply Current . . . . . . . . . . . . . . . 5.0µA (Max)
• Propagation Delay . . . . . . . . . . . . . . . . . . . . . . 16ns (Max)
Applications
• High Speed Control Circuits
• Sensor Monitoring
• Low Power Designs
Ordering Information
ORDERING NUMBER
5962F9863101VCC
ACS21D/SAMPLE-03
5962F9863101VXC
ACS21K/SAMPLE-03
5962F9863101V9A
INTERNAL MARKETING
NUMBER
ACS30DMSR-03
ACS30D/SAMPLE-03
ACS30KMSR-03
ACS30K/SAMPLE-03
ACS30HMSR-03
TEMP. RANGE (
o
C)
-55 to 125
25
-55 to 125
25
25
PACKAGE
14 Ld SBDIP
14 Ld SBDIP
14 Ld Flatpack
14 Ld Flatpack
Die
DESIGNATOR
CDIP2-T14
CDIP2-T14
CDFP3-F14
CDFP3-F14
NA
Pinouts
ACS30MS
(SBDIP)
TOP VIEW
A 1
B 2
C 3
D 4
E 5
F 6
GND 7
14 V
CC
13 NC
12 H
11 G
10 NC
9 NC
8 Y
ACS30MS
(FLATPACK)
TOP VIEW
A
B
C
D
E
F
GND
1
2
3
4
5
6
7
14
13
12
11
10
9
8
V
CC
NC
H
G
NC
NC
Y
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999

5962F9863101VXC相似产品对比

5962F9863101VXC 5962F9863101V9A ACS30KMSR-03 ACS30DMSR-03 ACS30HMSR-03 5962F9863101VCC
描述 8-INPUT NAND GATE, CDFP14, CERAMIC, DFP-14 8-INPUT NAND GATE, UUC11, 0.094 X 0.094 INCH, DIE-11 8-INPUT NAND GATE, CDFP14, CERAMIC, DFP-14 8-INPUT NAND GATE, CDIP14, SIDE BRAZED, CERAMIC, DIP-14 8-INPUT NAND GATE, UUC11, 0.094 X 0.094 INCH, DIE-11 8-INPUT NAND GATE, CDIP14, SIDE BRAZED, CERAMIC, DIP-14
零件包装代码 DFP DIE DFP DIP DIE DIP
包装说明 DFP, FL14,.3 DIE, DFP, DIP, DIE, DIP, DIP14,.3
针数 14 11 14 14 11 14
Reach Compliance Code not_compliant unknown unknown unknown unknown not_compliant
JESD-30 代码 R-CDFP-F14 S-XUUC-N11 R-CDFP-F14 R-CDIP-T14 S-XUUC-N11 R-CDIP-T14
逻辑集成电路类型 NAND GATE NAND GATE NAND GATE NAND GATE NAND GATE NAND GATE
功能数量 1 1 1 1 1 1
输入次数 8 8 8 8 8 8
端子数量 14 11 14 14 11 14
封装主体材料 CERAMIC, METAL-SEALED COFIRED UNSPECIFIED CERAMIC, METAL-SEALED COFIRED CERAMIC, METAL-SEALED COFIRED UNSPECIFIED CERAMIC, METAL-SEALED COFIRED
封装代码 DFP DIE DFP DIP DIE DIP
封装形状 RECTANGULAR SQUARE RECTANGULAR RECTANGULAR SQUARE RECTANGULAR
封装形式 FLATPACK UNCASED CHIP FLATPACK IN-LINE UNCASED CHIP IN-LINE
传播延迟(tpd) 16 ns 16 ns 16 ns 16 ns 16 ns 16 ns
认证状态 Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified
表面贴装 YES YES YES NO YES NO
技术 CMOS CMOS CMOS CMOS CMOS CMOS
端子形式 FLAT NO LEAD FLAT THROUGH-HOLE NO LEAD THROUGH-HOLE
端子位置 DUAL UPPER DUAL DUAL UPPER DUAL
最高工作温度 125 °C - 125 °C 125 °C - 125 °C
最低工作温度 -55 °C - -55 °C -55 °C - -55 °C
座面最大高度 2.92 mm - 2.92 mm 5.08 mm - 5.08 mm
温度等级 MILITARY - MILITARY MILITARY - MILITARY
端子节距 1.27 mm - 1.27 mm 2.54 mm - 2.54 mm
宽度 6.285 mm - 6.285 mm 7.62 mm - 7.62 mm
Base Number Matches 1 1 1 1 1 -

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