Step-Down DC/DC Controller
TLE 6389
1
1.1
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1)
Overview
Features
Input voltage range from < 5V up to 60V
Output voltage: 5V fixed or adjustable (7V to 15V)
Output voltage accuracy: 3%
Output current up to 2.3A
100% maximum duty cycle
Less than 120µA quiescent current at low loads
1)
2µA max. shutdown current at device off (TLE 6389-2 GV)
Fixed 360kHz switching frequency
Frequency synchronization input for external clocks
Current Mode control scheme
Integrated output under voltage Reset circuit
On chip low battery detector (on chip comparator)
Automotive temperature range -40°C to 150 °C
Green Product (RoHS compliant)
AEC qualified
dependend on external components
P DSO 14 3 8 9 11 1
V
IN
R
SENSE
=
47mΩ
M1
L
1
= 47
µH
V
OUT
I
OUT
C
IN1
=
100
µ
F
C
BDS
=
220 nF
11
BDS
VS
7
SI
SI_GND
6
14
CS
12
GDRV
2
D1
C
OUT
=
100
µF
M1: Infineon BSO613SPV
Infineon BSP613P
D1: Motorola MBRD360
L1: EPCOS B82479-A1473-M
Coilcraft DO3340P-473
C
IN1
: Electrolythic
C
IN2
: Ceramic
C
OUT
: Low ESR Tantalum
13
R
SI1
=
400kΩ
R
SI2
=
100kΩ
C
IN2
=
220nF
TLE6389-3 GV50
SI_ENABLE
1
ON OFF
SYNC
5
GND
4
3
FB
VOUT
9
SO
8
COMP
RO
10
2.2nF 680Ω
Type
TLE 6389-2 GV
TLE 6389-2 GV50
TLE 6389-3 GV50
Datasheet Rev. 2.1
Package
PG-DSO-14-1
PG-DSO-14-1
PG-DSO-14-1
1
Description
adjustable
5V, RO-Hysteresis <<
5V, RO-Hysteresis 1V
2007-08-13
TLE 6389
1.2
Short functional description
The TLE 6389 step-down DC-DC switching controllers provide high efficiency over loads
ranging from 1mA up to 2.5A. A unique PWM/PFM control scheme operates with up to
a 100% duty cycle, resulting in very low dropout voltage. This control scheme eliminates
minimum load requirements and reduces the supply current under light loads to 120µA,
depending on dimensioning of external components. In addition the adjustable version
TLE6389-2 GV can be shut down via the Enable input reducing the input current to
<2µA. The TLE 6389 step-down controllers drive an external P-channel MOSFET,
allowing design flexibility for applications up to 12.5W of output power. A high switching
frequency and operation in continuous-conduction mode allow the use of tiny surface-
mount inductors. Output capacitor requirements are also reduced, minimizing PC board
area and system costs. The output voltage is preset at 5V (TLE6389-2 GV50 and
TLE6389-3 GV50) and adjustable for the TLE6389-2 GV. The version TLE6389-2 GV50
features a reset function with a threshold between 4.5V and 4.8V, including a small
hysteresis of typ. 50mV. In the version TLE6389-3 GV50 the device incorporates a reset
with a typ. 1V hysteresis. Input voltages of all TLE 6389 can be up to 60V.
1.3
Pin Configuration (top view
)
ENABLE /
SI_ENABLE
FB
VOUT
GND
SYNC
SI_GND
SI
1
2
3
4
5
6
7
14
CS
13
VS
12
GDRV
P-D-SO-14
11
BDS
10
RO
9
8
SO
COMP
Datasheet Rev. 2.1
2
2007-08-13
TLE 6389
1.4
Basic block diagram
VS
ENA
BLE
SI
SI-
GND
VOUT
BDS
Internal Power
Supply and
Biasing
Battery Sense and
Undervoltage Reset
RO
SO
FB
PWM / PFM
Regulator
Driver
G
DRV
CS
COMP
Voltage
Reference
Block
Clock generator
SYNC
TLE 6389GV
GND
Datasheet Rev. 2.1
3
2007-08-13
TLE 6389
1.5
Pin No
1
Pin Definitions and Functions
Symbol
Function
ENABLE
Active-High enable input (only at adjustable version, TLE6389-2 GV)
for the device.
The device is shut down when ENABLE is driven low. In this shut down-
mode the reference, the output and the external MOSFET are turned off.
Connect to logic high for normal operation.
SI_ENA
BLE
Active-High enable input (only at 5V version, TLE6389-2 GV50 and
TLE6389-3 GV50) for SI_GND input.
SI_GND is switched to high impedance when SI_ENABLE is low. High
level at SI_ENABLE connects SI_GND to GND with low impedance. SO is
undefined when SI_ENABLE is low.
Feedback input.
1. For adjustable version (-2GV) connect this pin to an external voltage
divider from the output to GND (see the determining the output voltage,
application section).
2. At the 5V fixed output voltage version (-3GV50 and -2GV50) the FB is
connected internally to an on-chip voltage divider. It does not have to be
connected externally to the output.
Buck output voltage input.
Input for the internal supply. Connect always to the output of the buck
converter (output capacitor).
Ground connection.
Analog signal ground.
Input for external frequency synchronization.
An external clock signal connected to this pin allows switching frequency
synchronization of the device. The internal oscillator is clocked then by the
frequency applied at the SYNC input.
SI-Ground input.
Ground connection for SI comparator resistor divider. Depending on
SI_ENABLE this input is switched to high impedance or low ohmic to GND.
Sense comparator input.
Input of the low-battery comparator. This input is compared to an internal
1.25V reference where SO gives the result of the comparison. Can be
used for any comparison, not necessarily as battery sense.
Compensation input.
Connect via RC-compensation network to GND.
Sense comparator output.
Open drain output from SI comparator at the adjustable version (TLE6389-
2 GV),
Pull down structure with an internal 20kΩ pull up resistor to VOUT at the
5V version (TLE6389-2 GV50 and TLE6389-3 GV50).
1
2
FB
3
VOUT
4
5
GND
SYNC
6
SI_GND
7
SI
8
9
COMP
SO
Datasheet Rev. 2.1
4
2007-08-13
TLE 6389
Pin No
10
Symbol
RO
Function
Reset output.
Open drain output from undervoltage reset comparator at the adjustable
version (TLE6389-2 GV),
Pull down structure with an internal 20kΩ pull up resistor to VOUT at the
5V version (TLE6389-2 GV50 and TLE6389-3 GV50).
Buck driver supply input.
Connect a ceramic capacitor between BDS and VS to generate clamped
gate-source voltage to supply the driver of the PMOS power stage.
Gate drive output.
Connect to the gate of the external P-Channel MOSFET. The voltage at
GDRV swings between the levels of VS and BDS.
Device supply input.
Connect a 220nF ceramic cap close to the pin in addition to the low ESR
tantalum input capacitance.
Current-sense input.
Connect current-sense resistor between VS and CS. The voltage drop
over the sense-resistor determines the peak current flowing in the buck
circuit. The external MOSFET is turned off when the peak current is
exceeded.
11
BDS
12
GDRV
13
VS
14
CS
Datasheet Rev. 2.1
5
2007-08-13
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