74ACTQ827 Quiet Series 10-Bit Buffer/Line Driver with 3-STATE Outputs
March 1990
Revised September 2000
74ACTQ827
Quiet Series
10-Bit Buffer/Line Driver
with 3-STATE Outputs
General Description
The ACTQ827 10-bit bus buffer provides high performance
bus interface buffering for wide data/address paths or
buses carrying parity. The 10-bit buffers have NOR output
enables for maximum control flexibility. The ACTQ827 uti-
lizes Fairchild Quiet Series
technology to guarantee quiet
output switching and improved dynamic threshold perfor-
mance. FACT Quiet Series
features GTO
output control
and undershoot corrector in addition to a split ground bus
for superior performance.
Features
s
Guaranteed simultaneous switching noise level and
dynamic threshold performance
s
Guaranteed pin-to-pin skew AC performance
s
Inputs and outputs on opposite sides of package allow
easy interface with microprocessors
s
Improved latch-up immunity
s
Outputs source/sink 24 mA
s
TTL compatible inputs
Ordering Code:
Order Number
74ACTQ827SC
74ACTQ827SPC
Package Number
M24B
N24C
Package Description
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbols
Connection Diagram
IEEE/IEC
Pin Descriptions
Pin Names
OE
1
, OE
2
D
0
–D
9
O
0
–O
9
Description
Output Enable
Data Inputs
Data Outputs
FACT, Quiet Series, FACT Quiet Series and GTO are trademarks of Fairchild Semiconductor Corporation.
© 2000 Fairchild Semiconductor Corporation
DS010687
www.fairchildsemi.com
74ACTQ827
Absolute Maximum Ratings
(Note 1)
Supply Voltage (V
CC
)
DC Input Diode Current (I
IK
)
V
I
= −
0.5V
V
I
=
V
CC
+
0.5V
DC Input Voltage (V
I
)
DC Output Diode Current (I
OK
)
V
O
= −
0.5V
V
O
=
V
CC
+
0.5V
DC Output Voltage (V
O
)
DC Output Source
or Sink Current (I
O
)
DC V
CC
or Ground Current
per Output Pin (I
CC
or I
GND
)
Storage Temperature (T
STG
)
DC Latch-Up Source
or Sink Current
Junction Temperature (T
J
)
PDIP
140
°
C
−
0.5V to
+
7.0V
−
20 mA
+
20 mA
−
0.5V to V
CC
+
0.5V
−
20 mA
+
20 mA
−
0.5V to V
CC
+
0.5V
±
50 mA
±
50 mA
−
65
°
C to
+
150
°
C
±
300 mA
Recommended Operating
Conditions
Supply Voltage (V
CC
)
Input Voltage (V
I
)
Output Voltage (V
O
)
Operating Temperature (T
A
)
Minimum Input Edge Rate
∆
V/
∆
t
V
IN
from 0.8V to 2.0V
V
CC
@ 4.5V, 5.5V
4.5V to 5.5V
0V to V
CC
0V to V
CC
−
40
°
C to
+
85
°
C
125 mV/ns
Note 1:
Absolute maximum ratings are those values beyond which damage
to the device may occur. The databook specifications should be met, with-
out exception, to ensure that the system design is reliable over its power
supply, temperature, and output/input loading variables. Fairchild does not
recommend operation of FACT circuits outside databook specifications.
DC Electrical Characteristic
Symbol
V
IH
V
IL
V
OH
Parameter
Minimum HIGH Level
Input Voltage
Maximum LOW Level
Input Voltage
Minimum HIGH Level
Output Voltage
V
CC
(V)
4.5
5.5
4.5
5.5
4.5
5.5
4.5
5.5
V
OL
Maximum LOW Level
Output Voltage
4.5
5.5
4.5
5.5
I
IN
I
OZ
I
CCT
I
OLD
I
OHD
I
CC
V
OLP
V
OLV
V
IHD
V
ILD
Maximum Input
Leakage Current
Maximum 3-STATE
Current
Maximum I
CC
/Input
Minimum Dynamic
Output Current (Note 3)
Maximum Quiescent
Supply Current
Quiet Output
Maximum Dynamic V
OL
Quiet Output
Minimum Dynamic V
OL
Minimum HIGH Level
Dynamic Input Voltage
Maximum LOW Level
Dynamic Input Voltage
5.5
5.5
5.5
5.5
5.5
5.5
5.0
5.0
5.0
5.0
1.1
−0.6
1.9
1.2
8.0
1.6V
−1.3
2.0
0.8
0.6
0.001
0.001
T
A
= +25°C
Typ
1.5
1.5
1.5
1.5
4.49
5.49
2.0
2.0
0.8
0.8
4.4
5.4
3.86
4.86
0.1
0.1
0.36
0.36
±0.1
±0.5
T
A
= −40°C
to
+85°C
Guaranteed Limits
2.0
2.0
0.8
0.8
4.4
5.4
3.76
4.76
0.1
0.1
0.44
0.44
±1.0
±5.0
1.5
75
−75
80.0
µA
µA
mA
mA
mA
µA
V
V
V
V
V
Units
V
V
V
Conditions
V
OUT
=
0.1V
or V
CC
−
0.1V
V
OUT
=
0.1V
or V
CC
−
0.1V
I
OUT
= −50 µA
V
IN
=
V
IL
or V
IH
V
I
OH
= −24
mA
I
OH
= −24
mA (Note 2)
I
OUT
=
50
µA
V
IN
=
V
IL
or V
IH
V
I
OL
=
24 mA
I
OL
=
24 mA (Note 2)
V
I
=
V
CC
, GND
V
I
=
V
IL
, V
IH
V
O
=
V
CC
, GND
V
I
=
V
CC
−
2.1V
V
OLD
=
1.65V Max
V
OHD
=
3.85V Min
V
IN
=
V
CC
or GND
Figures 1, 2
(Note 4)(Note 5)
Figures 1, 2
(Note 4)(Note 5)
(Note 4)(Note 6)
(Note 4)(Note 6)
3
www.fairchildsemi.com
74ACTQ827
DC Electrical Characteristic
Note 4:
DIP package.
(Continued)
Note 2:
All outputs loaded; thresholds on input associated with output under test.
Note 3:
Maximum test duration 2.0 ms, one output loaded at a time.
Note 5:
Max number of outputs defined as (n). Data inputs are driven 0V to 3V. One output @ GND.
Note 6:
Max number of data inputs (n−1) inputs switching 0V to 3V (ACTQ). Input-under-test switching:
3V to threshold (V
ILD
), 0V to threshold. (V
IHD
), f
=
1 MHz.
AC Electrical Characteristics
V
CC
Symbol
t
PHL
t
PLH
t
PZL
t
PZH
t
PHZ
t
PLZ
t
OSHL
t
OSLH
Parameter
Propagation Delay
Data to Output
Output Enable Time
Output Disable Time
Output to Output Skew
Data to Output (Note 8)
(V)
(Note 7)
5.0
5.0
5.0
5.0
Min
2.5
3.0
1.0
T
A
= +25°C
C
L
=
50 pF
Typ
5.6
7.1
5.8
0.5
Max
8.0
10.0
8.0
1.5
T
A
= −40°C
to
+85°C
C
L
=
50 pF
Min
2.5
3.0
1.0
Max
9.0
11.0
8.5
1.5
ns
ns
ns
ns
Units
Note 7:
Voltage Range 5.0 is 5.0V
±
0.5V.
Note 8:
Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs within the same packaged device.
The specification applies to any outputs switching in the same direction, either HIGH-to-LOW (t
OSHL
) or LOW-to-HIGH (t
OSLH
). Parameter guaranteed by
design. Not tested.
Capacitance
Symbol
C
IN
C
PD
Parameter
Input Capacitance
Power Dissipation Capacitance
Typ
4.5
82
Units
pF
pF
V
CC
=
OPEN
V
CC
=
5.0V
Conditions
www.fairchildsemi.com
4
74ACTQ827
FACT Noise Characteristics
The setup of a noise characteristics measurement is critical
to the accuracy and repeatability of the tests. The following
is a brief description of the setup used to measure the
noise characteristics of FACT.
Equipment:
Hewlett Packard Model 8180A Word Generator
PC-163A Test Fixture
Tektronics Model 7854 Oscilloscope
Procedure:
1. Verify Test Fixture Loading: Standard Load 50 pF,
500
Ω
.
2. Deskew the HFS generator so that no two channels
have greater than 150 ps skew between them. This
requires that the oscilloscope be deskewed first. It is
important to deskew the HFS generator channels
before testing. This will ensure that the outputs switch
simultaneously.
3. Terminate all inputs and outputs to ensure proper load-
ing of the outputs and that the input levels are at the
correct voltage.
4. Set the HFS generator to toggle all but one output at a
frequency of 1 MHz. Greater frequencies will increase
DUT heating and effect the results of the measure-
ment.
5. Set the word generator input levels at 0V LOW and 3V
HIGH for ACT devices and 0V LOW and 5V HIGH for
AC devices. Verify levels with an oscilloscope.
V
OLP
/V
OLV
and V
OHP
/V
OHV
:
• Determine the quiet output pin that demonstrates the
greatest noise levels. The worst case pin will usually be
the furthest from the ground pin. Monitor the output volt-
ages using a 50
Ω
coaxial cable plugged into a standard
SMB type connector on the test fixture. Do not use an
active FET probe.
• Measure V
OLP
and V
OLV
on the quiet output during the
worst case transition for active and enable. Measure
V
OHP
and V
OHV
on the quiet output during the worst
case active and enable transition.
• Verify that the GND reference recorded on the oscillo-
scope has not drifted to ensure the accuracy and repeat-
ability of the measurements.
V
ILD
and V
IHD
:
• Monitor one of the switching outputs using a 50
Ω
coaxial
cable plugged into a standard SMB type connector on
the test fixture. Do not use an active FET probe.
• First increase the input LOW voltage level, V
IL
, until the
output begins to oscillate or steps out a min of 2 ns.
Oscillation is defined as noise on the output LOW level
that exceeds V
IL
limits, or on output HIGH levels that
exceed V
IH
limits. The input LOW voltage level at which
oscillation occurs is defined as V
ILD
.
• Next decrease the input HIGH voltage level, V
IH
, until
the output begins to oscillate or steps out a min of 2 ns.
Oscillation is defined as noise on the output LOW level
that exceeds V
IL
limits, or on output HIGH levels that
exceed V
IH
limits. The input HIGH voltage level at which
oscillation occurs is defined as V
IHD
.
• Verify that the GND reference recorded on the oscillo-
scope has not drifted to ensure the accuracy and repeat-
ability of the measurements.
Note 9:
V
OHV
and V
OLP
are measured with respect to ground reference.
Note 10:
Input pulses have the following characteristics: f
=
1 MHz,
t
r
=
3 ns, t
f
=
3 ns, skew
<
150 ps.
FIGURE 1. Quiet Output Noise Voltage Waveforms
FIGURE 2. Simultaneous Switching Test Circuit
5
www.fairchildsemi.com
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
