74ACT16541 16-Bit Buffer/Line Driver with 3-STATE Outputs
August 1999
Revised May 2005
74ACT16541
16-Bit Buffer/Line Driver with 3-STATE Outputs
General Description
The ACT16541 contains sixteen non-inverting buffers with
3-STATE outputs designed to be employed as a memory
and address driver, clock driver, or bus oriented transmit-
ter/receiver. The device is byte controlled. Each byte has
separate 3-STATE control inputs which can be shorted
together for full 16-bit operation.
Features
s
Separate control logic for each byte
s
Outputs source/sink 24 mA
s
TTL-compatible inputs
Ordering Code:
Order Number
74ACT16541SSC
74ACT16541MTD
Package Number
MS48A
MTD48
Package Description
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbol
Connection Diagram
Pin Descriptions
Pin Names
OE
n
I
0
–I
15
O
0
–O
15
Description
Output Enable Input (Active LOW)
Inputs
Outputs
FACT
¥
is a trademark of Fairchild Semiconductor Corporation
© 2005 Fairchild Semiconductor Corporation
DS500300
www.fairchildsemi.com
74ACT16541
Functional Description
The ACT16541 contains sixteen non-inverting buffers with
3-STATE standard outputs. The device is byte controlled
with each byte functioning identically, but independent of
the other. The control pins can be shorted together to
obtain full 16-bit operation. The 3-STATE outputs are con-
trolled by an Output Enable (OE
n
) input for each byte.
When OE
n
is LOW, the outputs are in 2-state mode. When
OE
n
is HIGH, the outputs are in the high impedance mode,
but this does not interfere with entering new data into the
inputs.
Truth Tables
Inputs
OE
1
L
H
X
L
OE
2
L
X
H
L
Inputs
OE
3
L
H
X
L
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Z = High Impedance
Outputs
I
0
–I
7
H
X
X
L
O
0
–O
7
H
Z
Z
L
Outputs
I
8
–I
15
H
X
X
L
O
8
–O
15
H
Z
Z
L
OE
4
L
X
H
L
Logic Diagram
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2
74ACT16541
Absolute Maximum Ratings
(Note 1)
Supply Voltage (V
CC
)
DC Input Diode Current (I
IK
)
V
I
=
0.5V
V
I
= V
CC
+ 0.5V
DC Output Diode Current (I
OK
)
V
O
=
0.5V
V
O
= V
CC
+ 0.5V
DC Output Voltage (V
O
)
DC Output Source/Sink Current (I
O
)
DC V
CC
or Ground Current
per Output Pin
Storage Temperature
0.5V to +7.0V
20 mA
+20 mA
Recommended Operating
Conditions
Supply Voltage (V
CC
)
Input Voltage (V
I
)
Output Voltage (V
O
)
Operating Temperature (T
A
)
Minimum Input Edge Rate (
'
V/
'
t)
V
IN
from 0.8V to 2.0V
V
CC
@ 4.5V, 5.5V
Note 1:
Absolute maximum ratings are those values beyond which damage
to the device may occur. The databook specifications should be met, with-
out exception to ensure that the system design is reliable over its power
supply, temperature, and output/input loading variables. Fairchild does not
recommend operation of FACT
¥
circuits outside databook specifications.
4.5V to 5.5V
0V to V
CC
0V to V
CC
20 mA
+20 mA
40
q
C to +85
q
C
125 mV/ns
0.5V to V
CC
+ 0.5V
r
50 mA
r
50 mA
65
q
C to +150
q
C
DC Electrical Characteristics
Symbol
V
IH
V
IL
V
OH
Parameter
Minimum HIGH
Input Voltage
Maximum LOW
Input Voltage
Minimum HIGH
Output Voltage
V
CC
(V)
4.5
5.5
4.5
5.5
4.5
5.5
4.5
5.5
V
OL
Maximum LOW
Output Voltage
4.5
5.5
4.5
5.5
I
OZ
I
IN
I
CCT
I
CC
I
OLD
I
OHD
Maximum 3-STATE
Leakage Current
Maximum Input
Leakage Current
Maximum I
CC
/Input
Max Quiescent
Supply Current
Minimum Dynamic
Output Current (Note 3)
5.5
75
mA
mA
V
OLD
= 1.65V Max
V
OHD
= 3.85V Min
5.5
5.5
0.6
8.0
1.5
80.0
mA
V
I
= V
CC
2.1V
V
IN
= V
CC
or GND
5.5
5.5
0.001
0.001
T
A
= +25
q
C
Typ
1.5
1.5
1.5
1.5
4.49
5.49
2.0
2.0
0.8
0.8
4.4
5.4
3.86
4.86
0.1
0.1
0.36
0.36
T
A
=
40
q
C to +85
q
C
Guaranteed Limits
2.0
2.0
0.8
0.8
4.4
5.4
3.76
4.76
0.1
0.1
0.44
0.44
V
Units
V
V
V
Conditions
V
OUT
= 0.1V
or V
CC
0.1V
V
OUT
= 0.1V
or V
CC
0.1V
I
OUT
=
50
P
A
V
IN
= V
IL
or V
IH
V
I
OH
=
24 mA
I
OH
=
24 mA (Note 2)
I
OUT
= 50
P
A
V
IN
= V
IL
or V
IH
V
I
OL
= 24 mA
I
OL
= 24 mA (Note 2)
V
I
= V
IL
, V
IH
V
O
= V
CC
, GND
V
I
= V
CC
, GND
r
0.5
r
0.1
r
5.0
r
1.0
P
A
P
A
P
A
75
Note 2:
All outputs loaded; thresholds associated with output under test.
Note 3:
Maximum test duration 2.0 ms; one output loaded at a time.
3
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74ACT16541
AC Electrical Characteristics
V
CC
Symbol
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
Note 4:
Voltage Range 5.0 is 5.0V
r
0.5V.
T
A
= +25
q
C
C
L
= 50 pF
Min
3.0
2.5
2.6
2.7
2.7
2.4
Typ
5.2
4.8
5.0
5.4
5.6
5.2
Max
7.3
7.3
7.4
8.0
8.3
7.9
T
A
=
40
q
C to +85
q
C
C
L
= 50 pF
Min
3.0
2.5
2.6
2.7
2.7
2.4
Max
7.8
7.8
7.9
8.5
8.7
8.4
ns
ns
ns
Units
Parameter
Propagation Delay
Data to Output
Output Enable Time
Output Disable Time
(V)
(Note 4)
5.0
5.0
5.0
Capacitance
Symbol
C
IN
C
PD
Parameter
Input Capacitance
Power Dissipation Capacitance
Typ
4.5
30
Units
pF
pF
V
CC
= 5.0V
V
CC
= 5.0V
Conditions
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4
74ACT16541
Physical Dimensions
inches (millimeters) unless otherwise noted
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide
Package Number MS48A
5
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