Freescale Semiconductor
Technical Data
Document Number: MC100ES6017
Rev 2, 09/2005
3.3 V ECL/PECL Quad Differential
Receiver
The MC100ES6017 is a 3.3 V ECL/PECL quad differential receiver. Under
open input conditions, the D input will be biased at V
CC
/2 and the D input will be
pulled down to V
EE
. This operation will force the Q output LOW and ensure
stability.
For single-ended input conditions, the unused differential input is connected
to V
BB
as a switching reference voltage. V
BB
may also rebias AC coupled inputs.
When used, decouple V
BB
and V
CC
via a 0.01
µF
capacitor and limit current
sourcing or sinking to 0.5 mA. When not used, V
BB
should be left open.
Features
•
•
•
•
•
•
High bandwidth output transitions
LVPECL operating range: V
CC
= 3.0 V to 3.6 V
Internal input pulldown resistors on D inputs, pullup and pulldown resistors on
D inputs
20 lead SOIC package
Ambient temperature range -40°C to +85°C
20-lead Pb-free package available
MC100ES6017
ECL/PECL QUAD
DIFFERENTIAL RECEIVER
DW SUFFIX
20-LEAD SOIC PACKAGE
CASE 751D-07
V
CC
20
Q0
19
Q0
18
Q1
17
Q1
16
Q2
15
Q2
14
Q3
13
Q3
12
V
EE
11
EG SUFFIX
20-LEAD SOIC PACKAGE
Pb-FREE PACKAGE
CASE 751D-07
ORDERING INFORMATION
Device
1
V
CC
2
D0
3
D0
4
D1
5
D1
6
D2
7
D2
8
D3
9
D3
10
V
BB
MC100ES6017DW
MC100ES6017DWR2
MC100ES6017EG
MC100ES6017EGR2
Package
SO-20
SO-20
SO-20 (Pb-Free)
SO-20 (Pb-Free)
Figure 1. 20-Lead Pinout
(Top View)
and Logic Diagram
PIN DESCRIPTION
Pin
Dn, Dn
Qn, Qn
V
BB
V
CC
V
EE
Function
ECL Differential Data Inputs
ECL Differential Data Outputs
Reference Voltage Output
Positive Supply
Negative Supply
© Freescale Semiconductor, Inc., 2005. All rights reserved.
Table 1. General Specifications
Characteristics
Internal Input Pulldown Resistor
Internal Input Pullup Resistor
ESD Protection
Human Body Model
Machine Model
Charged Device Model
0 LFPM, 20 SOIC
500 LFPM, 20 SOIC
Value
75 kΩ
75 kΩ
> 2000 V
> 200 V
> 1500 V
90 °C/W
60 °C/W
θ
JA
Thermal Resistance (Junction to Ambient)
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
Table 2. Absolute Maximum Ratings
(1)
Symbol
V
SUPPLY
V
IN
I
OUT
I
BB
TA
T
STG
Parameter
Power Supply Voltage
Input Voltage
Output Current
V
BB
Sink/Source
Operating Temp Range
Storage Temp Range
Conditions
difference between V
CC
& V
EE
V
CC
- V
EE
≤
3.6 V
Continuous
Surge
Rating
3.9
V
CC
+ 0.3
V
EE
- 0.3
50
100
± 0.5
-40 to +85
-65 to +150
Unit
V
V
V
mA
mA
mA
°C
°C
1. Absolute maximum continuous ratings are those maximum values beyond which damage to the device may occur. Exposure to these
conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation at absolute-maximum-rated
conditions is not implied.
Table 3. DC Characteristics
(V
CC
= 3.0 to 3.6 V; V
EE
= 0 V or V
CC
= 0 V; V
EE
= -3.6 to -3.0 V)
-40°C
Symbol
I
EE
V
OH(1)
V
OL(1)
V
IH
V
IL
V
BB(2)
V
PP
V
CMR
I
IH
I
IL
Characteristic
Power Supply Current
Output HIGH Voltage
Output LOW Voltage
Input HIGH Voltage
Input LOW Voltage
Output Voltage Reference (I
BB
= 0.5 mA)
Differential Input Votage
Differential Cross Point Voltage
Input HIGH Current
Input LOW Current
Dn
Dn
0.5
-300
Min
Typ
20
V
CC
- 1150 V
CC
- 1020
V
CC
- 1165
V
CC
- 1810
V
CC
- 1440
0.12
V
EE
+ 1.3
Max
31
V
CC
- 800
V
CC
- 880
V
CC
- 1200
V
CC
- 1165
Min
0°C to 85°C
Typ
28
V
CC
- 970
Max
35
V
CC
- 750
V
CC
- 880
V
CC
- 1475
V
CC
- 1235
1.3
V
CC
- 0.9
150
0.5
-300
Unit
mA
mV
mV
mV
mV
mV
V
V
µA
µA
µA
V
CC
- 1950 V
CC
- 1620 V
CC
- 1250 V
CC
- 2000 V
CC
- 1680 V
CC
- 1300
V
CC
- 1475 V
CC
- 1810
V
CC
- 1235 V
CC
- 1440
1.3
V
CC
- 0.9
150
0.12
V
EE
+ 1.3
1. Outputs are terminated through a 50Ω resistor to V
CC
-2 volts.
2. Input swing is centered around V
BB
.
MC100ES6017
2
Advanced Clock Drivers Device Data
Freescale Semiconductor
Table 4. AC Characteristics
(V
CC
= 3.0 to 3.6 V; V
EE
= 0 V or V
CC
= 0 V; V
EE
= -3.6 to -3.0 V)
-40°C
Symbol
f
max
t
PLH
,
t
PHL
t
SKEW
Characteristic
Maximum Toggle Frequency
Propagation Delay to Output
Diff
S.E.
(1)
310
225
Min
Typ
1.75
510
595
50
200
50
1
150
50
1000
250
150
50
310
225
Max
Min
25°C
Typ
1.75
510
595
50
200
50
1
1000
250
150
50
310
225
Max
Min
85°C
Typ
1.75
510
595
50
200
50
1
1000
250
Max
Unit
GHz
ps
ps
Data Path Skew
(2)
(differential)
Part-to-Part Skew
(2)
(differential)
Pulse Width Skew
(2) (3)
(differential)
Cycle to Cycle Jitter
Input Swing
Output Rise/Fall Times (20% - 80%)
t
JITTER
V
PP(4)
t
r
/ t
f
ps
mV
ps
1. Single-ended input propagation delay requires t
r
and t
f
≤
350 ps to meet specified propagation delay. Device will function with larger t
r
and t
f
values.
2. Skews are valid across specified voltage range, part-to-part skew is for a given temperature and frequency
3. Pulse width skew is the difference between a t
PLH
and t
PHL
propagation delay through a device.
4. V
PP
(min) is minimum input swing for which AC parameters guaranteed. The device has a DC gain of approximately 40.
MC100ES6017
Advanced Clock Drivers Device Data
Freescale Semiconductor
3
PACKAGE DIMENSIONS
PAGE 1 OF 2
CASE 751D-07
ISSUE J
20-LEAD SOIC PACKAGE
MC100ES6017
4
Advanced Clock Drivers Device Data
Freescale Semiconductor
PACKAGE DIMENSIONS
PAGE 2 OF 2
CASE 751D-07
ISSUE J
20-LEAD SOIC PACKAGE
MC100ES6017
Advanced Clock Drivers Device Data
Freescale Semiconductor
5
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