19-1942; Rev 3; 6/03
I
2
C-Compatible RTC in a TDFN
General Description
The MAX6900, I
2
C-bus-compatible real-time clock
(RTC) in a 6-pin TDFN package contains a real-time
clock/calendar and 31-byte
✕
8-bit wide of static ran-
dom access memory (SRAM). The real-time clock/cal-
endar provides seconds, minutes, hours, day, date,
month, and year information. The end of the month date
is automatically adjusted for months with fewer than 31
days, including corrections for leap year up to the year
2100. The clock operates in either the 24hr or 12hr for-
mat with an AM/PM indicator.
Features
♦
Real-Time Clock Counts Seconds, Minutes,
Hours, Date, Month, Day, and Year
♦
Leap Year Compensation Valid up to Year 2100
♦
Fast (400kHz) I
2
C-Bus-Compatible Interface from
2.0V to 5.5V
♦
31
✕
8 SRAM for Scratchpad Data Storage
♦
Uses Standard 32.768kHz, 12.5pF Load, Watch
Crystal
♦
Ultra-Low 225nA (typ) Timekeeping Current
♦
Single-Byte or Multiple-Byte (Burst Mode) Data
Transfer for Read or Write of Clock Registers or
SRAM
♦
6-Pin 3mm x 3mm x 0.8mm TDFN Surface-Mount
Package
♦
No External Crystal Bias Resistors or Capacitors
Required
MAX6900
Applications
Portable Instruments
Point-of-Sale Equipment
Intelligent Instruments
Battery-Powered Products
Ordering Information
PART
MAX6900ETT-T
TEMP RANGE
-40°C to +85°C
PIN-
PACKAGE
6 TDFN
TOP
MARK
AEU
Related Real-Time Clock Products
PART
MAX6900
MAX6901
MAX6902
SERIAL BUS
I
2
C compatible
3-wire
SPI™ compatible
SRAM
31
✕
8
31
✕
8
31
✕
8
ALARM
FUNCTION
—
Polled
Polled
OUTPUT
FREQUENCY
—
32kHz
—
PIN-PACKAGE
6 TDFN
8 TDFN
8 TDFN
SPI is a trademark of Motorola, Inc.
Pin Configuration
TOP VIEW
Typical Operating Circuit
V
CC
V
CC
1
6
SDA
V
CC
0.01μF
RPU
RPU
V
CC
X1 2
MAX6900
5
SCL
μC
5
SCL
1
V
CC
X1
2
CRYSTAL
X2 3
4
GND
RPU = t
r
/C
bus
6
MAX6900
3
SDA
X2
GND
4
TDFN
________________________________________________________________
Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
I
2
C-Compatible RTC in a TDFN
MAX6900
ABSOLUTE MAXIMUM RATINGS
V
CC
to GND ..............................................................-0.3V to +6V
All Other Pins to GND ................................-0.3V to (V
CC
+ 0.3V)
Input Current
All Pins ............................................................................20mA
Output Current
All Outputs .......................................................................20mA
Rate of Rise, V
CC
............................................................100V/µs
Continuous Power Dissipation (T
A
= +70°C)
6-Pin TDFN (derate 24.4mW/°C above +70°C) .......1951.0mW
Operating Temperature Range ...............................T
MIN
to T
MAX
MAX6900 ETT-T .......................T
MIN
= -40°C, T
MAX
= +85°C
Junction Temperature .....................................................+150°C
Storage Temperature Range ............................ -65°C to +150°C
ESD Protection (all pins, Human Body model) ..................2000V
Lead Temperature (soldering, 10s) ...…………………….+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
(V
CC
= +2.0V to +5.5V, T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at V
CC
= +3.3V, T
A
= +25°C.) (Note 1)
PARAMETER
Operating Voltage Range
Active Supply Current (Note 2)
Timekeeping Supply Current
(Note 3)
2-WIRE DIGITAL INPUTS SCL, SDA
Input High Voltage
Input Low Voltage
Input Hysteresis (Note 5)
Input Leakage Current (Note 4)
Input Capacitance (Note 5)
2-WIRE DIGITAL OUTPUT SDA
Output Low Voltage
V
OL
I
SINK
= 4mA
0.4
V
V
IH
V
IL
V
HYS
0 < V
IN
< V
CC
0.05 x
V
CC
-10
10
10
0.7 x V
CC
0.3 x
V
CC
V
V
V
nA
pF
SYMBOL
V
CC
I
CC
I
TK
V
CC
= +2.0V
V
CC
= +5.0V
V
CC
= +2.0V
V
CC
= +5.0V
0.225
1.2
CONDITIONS
MIN
2
TYP
MAX
5.5
30
110
0.630
1.7
UNITS
V
µA
µA
AC ELECTRICAL CHARACTERISTICS
(V
CC
= +2.0V to +5.5V, T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at V
CC
= +3.3V, T
A
= +25°C.) (Notes 1, 6)
PARAMETER
OSCILLATOR
X1 to Ground Capacitance
X2 to Ground Capacitance
FAST I C-BUS-COMPATIBLE TIMING
SCL Clock Frequency
Bus Free Time Between STOP
and START Condition (Note 4)
f
SCL
t
BUF
0
1.3
400
kHz
µs
2
SYMBOL
CONDITIONS
MIN
TYP
25
25
MAX
UNITS
pF
pF
2
_______________________________________________________________________________________
I
2
C-Compatible RTC in a TDFN
AC ELECTRICAL CHARACTERISTICS (continued)
(V
CC
= +2.0V to +5.5V, T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at V
CC
= +3.3V, T
A
= +25°C.) (Notes 1, 6)
PARAMETER
Hold Time After (Repeated)
START Condition (After this
Period, the First Clock Is
Generated)
Repeated START Condition
Setup Time
STOP Condition Setup Time
Data Hold Time (Note 7)
Data Setup Time
SCL Low Period
SCL High Period
Minimum SCL/SDA Rise Time
(Note 8)
Maximum SCL/SDA Rise Time
(Note 8)
Minimum SCL/SDA Fall Time
(Receiving) (Notes 8, 9)
Maximum SCL/SDA Fall Time
(Receiving) (Notes 8, 9)
Minimum SDA Fall Time
(Transmitting) (Notes 8, 9)
Maximum SDA Fall Time
(Transmitting) (Notes 8, 9)
Pulse Width of Spike Suppressed
Capacitive Load for Each
Bus Line
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
MAX6900
t
HD:STA
0.6
µs
t
SU:STA
t
SU:STO
t
HD:DAT
t
SU:DAT
t
LOW
t
HIGH
t
r
t
r
t
f
t
f
t
f
t
f
t
SP
C
B
0.6
0.6
0
100
1.3
0.6
20 +
0.1C
B
300
20 +
0.1C
B
300
20 +
0.1C
B
250
50
400
0.9
µs
µs
µs
ns
µs
µs
ns
ns
ns
ns
ns
ns
ns
pF
Note 1:
Note 2:
Note 3:
Note 4:
Note 5:
Note 6:
Note 7:
Note 8:
Note 9:
All parameters are 100% tested at T
A
= +25°C. Limits over temperature are guaranteed by design and not production tested.
I
CC
is specified with SCL = 400kHz and SDA = 400kHz.
I
TK
is specified with SCL = Logic High (4.7kΩ pullup resistor) and SDA = Logic High (4.7kΩ pullup resistor);
I
2
C-compatible bus inactive.
MAX6900 I/O pins do not obstruct the SDA and SCL lines if V
CC
is switched off.
Guaranteed by design. Not subject to production testing.
All values referred to V
IH min
and V
IL max
levels.
The MAX6900 internally provides a hold time of at least 300ns for the SDA signal (referred to the V
IH min
of the SCL signal)
in order to bridge the undefined region of the falling edge of SCL.
C
B
= total capacitance of one bus line in pF.
The maximum t
f
for the SDA and SCL bus lines is specified at 300ns. The maximum fall time for the SDA output stage t
f
is
specified at 250ns. This allows series protection resistors to be connected between the SDA/SCL pins and the SDA/SCL
bus lines without exceeding the maximum specified t
f
.
_______________________________________________________________________________________
3
I
2
C-Compatible RTC in a TDFN
MAX6900
Typical Operating Characteristics
(T
A
= +25°C, unless otherwise noted.)
TIMEKEEPING CURRENT vs. V
CC
1.6
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
V
CC
(V)
MAX6900 toc01
TIMEKEEPING CURRENT (µA)
1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
Pin Description
PIN
1
2
3
4
5
6
—
NAME
V
CC
X1
X2
GND
SCL
SDA
PAD
FUNCTION
Power Supply
32.768kHz External Crystal
32.768kHz External Crystal
Ground
I
2
C-Bus-Compatible Clock Input
I
2
C-Bus-Compatible Data
Input/Output
Ground
Detailed Description
The MAX6900 contains eight timekeeping registers,
burst address registers, a control register, an on-chip
32.768kHz oscillator circuit, and a serial 2-wire, I
2
C-
compatible interface. There are also 31 bytes, 8 bits
wide of SRAM on board. Time and calendar data are
stored in the registers in a binary-coded decimal (BCD)
format. Figure 1 shows an I
2
C-bus-compatible timing
diagram. Figure 2 shows the MAX6900 functional dia-
gram.
Real-Time Clock
The RTC provides seconds, minutes, hours, day, date,
month, and year information. The end of the month is
automatically adjusted for months with fewer than 31
BIT 6
(A6)
BIT 0
LSB
(R/W)
ACKNOWLEDGE
(A)
STOP
CONDITION
(P)
PROTOCOL
START
CONDITION
(S)
BIT 7
MSB
(A7)
t
LOW
t
SU:STA
t
HIGH
1/f
SCL
SCL
t
BUF
SDA
t
r
t
f
t
HD:STA
t
HD:DAT
t
HD:DAT
t
SU:STO
Figure 1. Detailed
I
2C-Bus Timing Diagrams
4
_______________________________________________________________________________________
I
2
C-Compatible RTC in a TDFN
MAX6900
X1
X2
1Hz
OSCILLATOR
32.768kHz
DIVIDER
SECONDS
MINUTES
HOURS
DATE
VCC
GND
CONTROL
LOGIC
MONTH
DAY
YEAR
SCL
SDA
CONTROL
I
2
C BUS
INTERFACE
ADDRESS
REGISTER
CENTURY
CLOCK
BURST
31 X 8
SRAM
Figure 2. Functional Diagram
days, including corrections for leap year up to the year
2100.
Applications Information
I
2
C-Bus-Compatible Interface
The I
2
C-bus-compatible serial interface allows bidirec-
tional, 2-wire communication between multiple ICs. The
two lines are SDA and SCL. Connect both lines to a
positive supply through individual pullup resistors. A
device on the I
2
C-compatible bus that generates a
message is called a transmitter and a device that
receives the message is a receiver. The device that
controls the message is the master and the devices
that are controlled by the master are called slaves
(Figure 3). The word message refers to data in the form
of three 8-bit bytes for a Single Read or Write. The first
byte is the Slave ID byte, the second byte is the
Address/Command byte, and the third is the data.
Data transfer can only be initiated when the bus is not
busy (both SDA and SCL are high). A high-to-low tran-
sition of SDA while SCL is high is defined as the Start
(S) condition; low-to-high transition of the data line
while SCL is high is defined as the Stop (P) condition
(Figure 4).
Crystal Oscillator
The MAX6900 uses an external, standard 12.5pF load
watch crystal. No other external components are
required for this timekeeping oscillator. Power-up oscil-
lator start-time is dependent mainly upon applied V
CC
and ambient temperature. The MAX6900, because of
its low timekeeping current, exhibits a typical startup
time between 5s to 10s.
I
2
C-Compatible Interface
Interfacing the MAX6900 with a microprocessor or
other I
2
C master is made easier by using the serial, I
2
C-
bus-compatible or other I
2
C master interface. Only 2
wires are required to communicate with the clock and
SRAM: SCL (serial clock) and SDA (data line). Data is
transferred to and from the MAX6900 over the I/O data
line, SDA. The MAX6900 uses 7-bit slave ID address-
ing. The MAX6900 does not respond to general call
address commands.
_______________________________________________________________________________________
5
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