QUICK START GUIDE FOR DEMONSTRATION CIRCUIT 906A
4-CHANNEL, 2-WIRE BUS MULTIPLEXER WITH CAPACITANCE BUFFERING
LTC4306IUFD
DESCRIPTION
Demonstration
circuit
906A
features
the
LTC
®
4306IUFD, a 4-channel, 2-wire I2C bus and
SMBus compatible multiplexer having bus buffers
that provide capacitive isolation between the up-
stream bus and downstream buses. Through soft-
ware control, the LTC4306IUFD connects the up-
stream 2-wire bus to any desired combination of
downstream buses. Each bus can be pulled up to a
supply voltage ranging from 2.2V to 5.5V, independ-
ent of the LTC4306IUFD supply voltage. The down-
stream buses are also provided with ALERT1B –
ALERT4B inputs for fault reporting.
Programmable timeout circuitry disconnects the
downstream buses if the bus is stuck low. When acti-
vated, rise time accelerators source currents into the
2-wire bus pins during rising edges to reduce rise
time. Two general purpose input/output (GPIO) pins
can be configured as inputs, open-drain outputs or
push-pull outputs. Green LED’s D3 and D2 light up
when GPIO1 and GPIO2, respectively, are low. Driv-
ing the ENABLE pin low restores all device features to
their default states. Three address pins provide 27
distinct addresses.
Design files for this circuit board are available. Call
the LTC factory.
LTC is a registered trademark of Linear Technology Corporation
Table 1. Performance Summary (T
A
= 25°C)
PARAMETER
V
CC
Voltage Operating Range
Bus Pull-up Supply Voltage Range (V
BUS1
-V
BUS4
)
2-Wire Bus Frequency Range
CONDITION
VALUE
2.7V – 5.5V
2.2V – 5.5V
0 - 400kHz
7.5ms, 15ms, 30ms options
Bus Stuck Low Disconnect Times
V
CC
= 2.7V - 5.5V
all times +/-16.7%
feature can also be disabled
Bus Buffer V
OL
Offset Voltage
Rise Time Accelerator Pull-up Current
ALERTB and READY Output V
OL
Voltages
R
BUS
= 10K
V
CC
= 3.3V
V
CC
= 5V
V
CC
= 2.7V - 5.5V; I
ALERTB
= I
READY
= 3mA
100mV (maximum)
5.5mA (typical)
9mA (typical)
0.4V (maximum)
OPERATING PRINCIPLES
For operation with the DC906A, connect the host con-
troller’s SDA and SCL pins to the LTC4306IUFD’s
SDAIN and SCLIN pins (hereafter referred to as the
upstream bus), and connect the upstream bus supply
of 2.7V to 5.5V to Vcc (as shown in Figure 1). The
host controller on the upstream side first addresses
and configures the LTC4306IUFD to connect the up-
stream bus to one or more of the four downstream
buses. Communications between the upstream and
downstream components are then established and a
host controller on any bus can then control the
LTC4306IUFD.
Use turrets VBUS1-VBUS4 and jumpers JP1-JP4 to
pull up the downstream buses to supply voltages dif-
ferent than VCC (i.e., to provide level-shifting). For
1
QUICK START GUIDE FOR DEMONSTRATION CIRCUIT 906A
4-CHANNEL, 2-WIRE BUS MULTIPLEXER WITH CAPACITANCE BUFFERING
fore, set jumper JP5 to the left position for normal
operation, and set it to the right position to disable
the LTC4306IUFD.
Slave devices that are capable of fault reporting and
that are located on downstream buses 1-4 should
connect their fault pins to ALERT1B-ALERT4B, re-
spectively. The LTC4306IUFD passes downstream
faults to the upstream host by pulling down on the
ALERTB pin, so this host’s fault input should be con-
nected to the LTC4306IUFD ALERTB pin.
When the upstream bus is connected to one or more
downstream buses, the READY pin voltage is pulled
up to V
CC
. When the upstream bus is disconnected
from all downstream buses, the READY voltage is low
(~0.2V).
On the DC906A, the board’s default setting for jump-
ers JP6, JP7 and JP8 is the center position, which
sets the address of the LTC4306IUFD to (1001 010)
2
.
To set a different address, configure the jumpers ac-
cording to Table 1 of the data sheet (note: left posi-
tion = H, middle position = NC, right position = L; de-
fault = NC for all three jumpers).
example, in Figure1, JP1 is set to the right position
and a supply voltage is connected between VBUS1
and ground. Voltages on VBUS1-VBUS4 must range
between 2.2V and 5.5V. To connect a downstream
bus’s pull-up supply to VCC, set its jumper to the left
position.
Additional configurations include enabling and dis-
abling the rise time accelerators on the backplane
side and/or the card side, setting the GPIO’s to open-
drain output, push-pull output, or input mode, setting
or resetting the GPIO’s outputs, disabling the Bus
Stuck Low disconnect feature or setting the discon-
nect time to 7.5ms, 15ms, 30ms. A host controller
can also read the internal registers of the
LTC4306IUFD to determine the settings of these fea-
tures as well as fault statuses. All of these features
are accessed by sending commands on the 2-wire
bus.
The ENABLE pin, when pulled low, resets the
LTC4306IUFD to its registers default state and dis-
ables communication to it. Communication can be
reestablished when ENABLE is released high. There-
QUICK START PROCEDURE
Demonstration circuit 906A is easy to set up to evalu-
ate the performance of the LTC4306IUFD. Refer to
Figure 1 for proper measurement equipment setup
and follow the procedure below:
KEY NOTES: a. Do not activate rise time accelerators
on buses whose pull-up supply voltages are lower
than VCC. b. Make sure logic low voltages forced on
all clock and data pins are < 0.4V. c. When activating
multiple downstream buses that are powered from
separate supply voltages, make sure that the
LTC4306IUFD’s VCC voltage is less than or equal to
the lowest downstream bus pull-up supply voltage.
1.
jumper to the right position, and connect the sup-
ply voltage to the appropriate turret on the left side
of the board.
2.
3.
Set jumper J5 in the left position to enable
communication to the LTC4306IUFD.
Configure jumpers JP6 – JP8 to set the desired 2-
wire bus address for the LTC4306IUFD according
to Table 1 on page 13 of the datasheet (note: left
position = H, middle position = NC, right position =
L; default = NC for all three jumpers).
Connect a cable from 6-pin header J2 to a board
containing the master device(s).
Connect a 20-pin ribbon cable from J1 to a board
that contains downstream slave devices. Note: the
downstream buses can contain masters, but the
original command to connect must come from a
4.
5.
Jumpers JP1-JP4 choose the pull-up supply volt-
ages VBUS1 – VBUS4 for downstream buses 1-4.
For unused buses and buses pulled up to VCC, set
the jumpers in the left position. To pull up a down-
stream bus to a different voltage than VCC, set its
2
PCB设计
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