FEATURES
s
s
LTC4302-1/LTC4302-2
Addressable
2-Wire Bus Buffers
DESCRIPTIO
The LTC
®
4302-1/LTC4302-2 addressable I
2
C bus and
SMBus compatible bus buffers allow a peripheral board
to be inserted and removed from a live backplane without
corruption of the bus. The LTC4302-1/LTC4302-2 main-
tain electrical isolation between the backplane and periph-
eral board until their V
CC
supply is valid and a master
device on the backplane side addresses the LTC4302-1/
LTC4302-2 and commands them to connect. The
LTC4302-1/LTC4302-2’s ADDRESS pin provides 32 pos-
sible addresses set by an external resistive divider be-
tween V
CC
and GND. The LTC4302-1/LTC4302-2 work
with supply voltages ranging from 2.7V to 5.5V. The SDA
and SCL inputs and outputs do not load the bus lines when
V
CC
is low.
Rise time accelerator circuitry* allows for heavier capaci-
tive bus loading while still meeting system timing require-
ments. During insertion, the SDA and SCL lines are
precharged to 1V to minimize bus disturbances. Two
general purpose input/output pins (GPIOs) on the
LTC4302-1 can be configured as inputs, open-drain out-
puts or push-pull outputs. The LTC4302-2 option replaces
one GPIO pin with a second supply voltage pin V
CC2
,
providing level shifting between systems with different
supply voltages. The LTC4302-1/LTC4302-2 are available
in a 10-pin MSOP package.
s
s
s
s
s
s
s
s
Bidirectional Buffer for SDA and SCL Lines
Increases Fanout
Connect SDA and SCL Lines with 2-Wire Bus
Commands
Prevents SDA and SCL Corruption During Live Board
Insertion and Removal from Backplane
Compatible with I
2
C
TM
Standard Mode, I
2
C Fast
Mode and SMBus Standards
Rise Time Accelerators on SDA, SCL Lines
1V Precharge on SDA and SCL Lines
32 Unique Addresses from a Single ADDRESS Pin
Two General Purpose Inputs-Outputs (LTC4302-1)
Translates Between 5V and 3.3V Systems
(LTC4302-2)
Small 10-Pin MSOP Package
APPLICATIO S
s
s
s
s
s
Live Board Insertion
5V/3.3V Level Translator
Servers
Capacitance Buffer/Bus Extender
Nested Addressing
, LTC and LT are registered trademarks of Linear Technology Corporation.
I
2
C is a trademark of Philips Electronics N.V.
*U.S. Patent No. 6,650,174
TYPICAL APPLICATIO
2.7V
to
5.5V
R3
10k
R4
10k
R1
1870Ω
R2
2000Ω
V
CC
LTC4302-1
SDA
CARD SDA
SDAIN SDAOUT
SCL
CARD SCL
SCLOUT
SCLIN
CONN
ADDRESS GPIO2
GPIO1
GND
R5
10k
C1
0.01µF
R6
10k
R7
10k
R8
1k
R9
1k
OUTPUT
SIDE
50pF
LED
LED
4203 TA01a
U
U
U
Input-Output Connection t
PLH
INPUT
SIDE
150pF
0.1µs/DIV
4032 F10
sn430212 430212fs
1
LTC4302-1/LTC4302-2
ABSOLUTE
AXI U
RATI GS
V
CC
to GND ................................................. –0.3V to 7V
SDAIN, SCLIN, SDAOUT, SCLOUT,
GPIO1, CONN, GPIO2 (LTC4302-1),
V
CC2
(LTC4302-2) ........................................ –0.3V to 7V
ADDRESS ....................................... –0.3V to V
CC
+ 0.3V
PACKAGE/ORDER I FOR ATIO
TOP VIEW
SDAIN
SCLIN
CONN
ADDRESS
GND
1
2
3
4
5
10
9
8
7
6
SDAOUT
SCLOUT
V
CC
GPIO2
GPIO1
ORDER PART
NUMBER
LTC4302CMS-1
LTC4302IMS-1
MS PART MARKING
LTYF
LTYG
SDAIN
SCLIN
CONN
ADDRESS
GND
1
2
3
4
5
MS PACKAGE
10-LEAD PLASTIC MSOP
T
JMAX
= 125°C,
θ
JA
= 130°C/W
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
The
q
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T
A
= 25°C.
V
CC
= 2.7V to 5.5V (LTC4302-1), V
CC
= V
CC2
= 2.7V to 5.5V (LTC4302-2) unless otherwise noted.
SYMBOL
V
CC
V
CC2
I
CC
I
VCC
I
VCC2
V
UVLOU
V
UVLOL
V
UVLO2U
V
UVLO2L
V
PRE
V
THCONN
t
PHL
t
PLH
PARAMETER
Positive Supply Voltage
Card Side Supply Voltage
Supply Current
V
CC
Supply Current
V
CC2
Supply Current
UVLO Upper Threshold
UVLO Lower Threshold
V
CC2
UVLO Upper Threshold
V
CC2
UVLO Lower Threshold
Precharge Voltage
CONN Threshold Voltage
CONN Delay, On-Off
CONN Delay, Off-On
CONDITIONS
LTC4302-1
LTC4302-2
V
SDAIN
= 0V, V
CC
= 5.5V (Note 2) LTC4302-1
V
SDAIN
= 0V, V
CC
= V
CC2
= 5.5V
(Note 2) LTC4302-2
V
SDAIN
= 0V, V
CC
= V
CC2
= 5.5V
(Note 2) LTC4302-2
V
CC
Rising
V
CC
Falling
LTC4302-2
LTC4302-2
SDA, SCL Floating
q
q
q
q
q
q
q
q
q
Power Supply/Start-Up
2.7
2.7
5.9
3.4
2.3
2.5
2.35
2.5
2.35
0.8
0.8
1
1.5
60
20
1.2
2.2
2.7
5.5
5.5
8
5
4
2.7
V
V
mA
mA
mA
V
V
V
V
V
V
ns
ns
2
U
U
W
W W
U
W
(Note 1)
Operating Temperature Range
LTC4302C-1/LTC4302C-2 ...................... 0°C to 70°C
LTC4302I-1/LTC4302I-2 .................... – 40°C to 85°C
Storage Temperature Range ................. – 65°C to 125°C
Lead Temperature (Soldering, 10 sec).................. 300°C
TOP VIEW
10
9
8
7
6
SDAOUT
SCLOUT
V
CC
V
CC2
GPIO1
ORDER PART
NUMBER
LTC4302CMS-2
LTC4302IMS-2
MS PART MARKING
LTABY
LTABZ
MS PACKAGE
10-LEAD PLASTIC MSOP
T
JMAX
= 125°C,
θ
JA
= 130°C/W
MIN
TYP
MAX
UNITS
sn430212 430212fs
LTC4302-1/LTC4302-2
ELECTRICAL CHARACTERISTICS
The
q
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T
A
= 25°C.
V
CC
= 2.7V to 5.5V (LTC4302-1), V
CC
= V
CC2
= 2.7V to 5.5V (LTC4302-2) unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
I
SINK
= 10mA, V
CC
= 2.7V
I
SOURCE
= 200µA, V
CC
= 2.7V
V
I/O
= 0V to 5.5V (Note 3)
Input Mode
Positive Transition on SDA, SCL,
Slew Rate = 0.8V/µs, V
CC
= 2.7V (Note 4)
10k to V
CC
on SDA, SCL Pins (Note 5),
(Note 9)
SDA, SCL Pins, I
SINK
= 3mA
SDA, SCL Pins, V
CC
= 0V to 5.5V
Connection Circuits Inactive
q
q
q
q
q
MIN
TYP
0.36
MAX
0.8
±5
UNITS
V
V
µA
V
mA
General Purpose I/Os
V
LOW
I/O Logic Low Voltage
V
HIGH
I
LEAK
I/O Logic High Voltage
I/O Leakage Current
2.4
0.8
1
1.5
2
2.2
V
THRESH
Input Threshold Voltage
Rise Time Accelerators
I
PULLUP,AC
Transient Boosted Pull-Up Current
Input-Output Connection
V
OS
Output-Input Offset Voltage
C
IN
V
OL
I
LEAK
Digital Input Capacitance
Output Low Voltage
Input Leakage Current
q
q
q
0
0
100
175
10
0.4
±5
mV
pF
V
µA
2-Wire Digital Interface Voltage Characteristics
V
LTH
Logic Threshold Voltage
I
LEAK
V
OL
Digital Input Leakage
Digital Output Low Voltage
V
CC
= 0V to 5.5V
I
PULLUP
= 3mA Into SDAIN Pin
q
q
q
0.3V
CC
0.5V
CC
0.7V
CC
±5
0.4
V
µA
V
kHz
µs
ns
ns
ns
ns
ns
ns
ns
ns
2-Wire Digital Interface Timing Characteristics (Note 6)
f
I2C,MAX
I
2
C Operating Frequency
(Note 9)
t
BUF
Bus Free Time Between Stop and Start
(Note 9)
Condition
t
HD,STA
Hold Time After (Repeated) Start Condition (Note 9)
t
SU,STA
t
SU,STO
t
HD,DATI
t
HD,DATO
t
SU,DAT
t
SP
t
f
Repeated Start Condition Setup Time
Stop Condition Setup Time
Data Hold Time Input
Data Hold Time Output
Data Setup Time
Pulse Width of Spikes Suppressed by
the Input Filter
Data Fall Time
(Note 9)
(Note 9)
(Note 9)
400
600
0.75
45
–30
–30
1.3
100
0
0
0
900
100
250
300
300
(Note 9)
(Note 9)
(Notes 7, 8, 9)
50
20 +
0.1C
B
–25
600
50
150
Note 1:
Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2:
The I
CC
tests are performed with the backplane-to-card connection
circuitry activated.
Note 3:
When the GPIOs are in open-drain output or input mode, the logic
high voltage can be provided by a pull-up supply voltage ranging from
2.2V to 5.5V, independent of the V
CC
voltage.
Note 4:
I
PULLUP,AC
varies with temperature and V
CC
voltage as shown in
the Typical Performance Characteristics section.
Note 5:
The connection circuitry always regulates its output to a higher
voltage than its input. The magnitude of this offset voltage as a function of
the pull-up resistor and V
CC
voltage is shown in the Typical Performance
Characteristics section.
Note 6:
The specifications in this section illustrate the LTC4302-1/
LTC4302-2’s compatibility with the I
2
C Fast Mode, the I
2
C Standard Mode
and SMBus specifications. See the Timing Diagram on page 5 for
illustrations of the timing parameters.
Note 7:
C
B
= total capacitance of one bus line in pF.
Note 8:
The digital interface circuit controls the data fall time only when
acknowledging or transmitting zeros during a read operation. The input-
output connection data and clock outputs meet the fall time specification
provided that the corresponding inputs meet the fall time specification.
Note 9:
Guaranteed by design. Not subject to test.
sn430212 430212fs
3
LTC4302-1/LTC4302-2
TYPICAL PERFOR A CE CHARACTERISTICS
(Specifications are at T
A
= 25°C unless otherwise noted.)
I
CC
vs Temperature
6.1
5.9
5.7
5.5
5.3
5.1
4.9
4.7
4.5
4.3
–40
25
TEMPERATURE (°C)
85
4302 G01
t
PHL
(ns)
I
CC
(mA)
I
PULLUPAC
vs Temperature
12
10
V
CC
= 5V
6
4
2
V
CC
= 2.7V
0
–50
–25
0
25
50
TEMPERATURE (°C)
75
100
4302 G03
V
OUT
– V
IN
(mV)
I
PULLUPAC
(mA)
8
4
U W
Input – Output t
PHL
vs Temperature
100
V
CC
= 2.7V
V
CC
= 5.5V
80
V
CC
= 3.3V
60
40
V
CC
= 5.5V
V
CC
= 2.7V
20
C
IN
= C
OUT
= 100pF
R
PULLUPIN
= R
PULLUPOUT
= 10k
0
–50
–25
0
25
50
TEMPERATURE (°C)
75
100
4302 G02
SDA, SCL V
OS
300
250
200
150
V
CC
= 5V
100
V
CC
= 3.3V
50
0
V
IN
= 0V
V
CC
= 3V
0
10
20
R
PULLUP
(KΩ)
30
40
4302 G04
sn430212 430212fs
LTC4302-1/LTC4302-2
PI FU CTIO S
SDAIN (Pin 1):
Serial Data Input. Connect this pin to the
SDA bus on the backplane. Do not float.
SCLIN (Pin 2):
Serial Clock Input. Connect this pin to the
SCL bus on the backplane. Do not float.
CONN (Pin 3):
Register Reset and Connection Sense
Input. Driving this pin low resets the registers to their
default state: GPIOs in output open-drain high impedance
mode, rise time accelerators disabled and the input-to-
output connection disabled. Communication with the
LTC4302-1/LTC4302-2 is disabled when CONN is low.
When CONN is brought back high, the registers remain in
the default state and communication is enabled.
ADDRESS (Pin 4):
2-Wire Address Programming Input.
The 2-wire address is programmed by connecting
ADDRESS to a resistive divider between V
CC
and ground.
The voltage on ADDRESS is converted by an internal
analog-to-digital (A/D) converter into a 5-bit digital word.
This resulting digital code represents the least significant
five bits of the 2-wire address. 1% resistors must be used
to ensure accurate address programming. 32 unique
addresses are possible. See Table 1 for 1% resistor values
and corresponding addresses. Care must also be taken to
minimize capacitance on ADDRESS. Resistors must be
placed close to the LTC4302-1/LTC4302-2’s V
CC
, GND
and ADDRESS pins.
GND (Pin 5):
Ground. Connect this pin to a ground plane
for best results.
GPIO1 (Pin 6):
General Purpose Input/Output (GPIO1).
GPIO1 can be used as an input, an open-drain output or a
push-pull output. The N-Channel MOSFET pulldown de-
vice is capable of driving LEDs. When used in input or
open-drain output mode, the I/O pin can be pulled up to a
supply voltage ranging from 2.2V to 5.5V independent of
the V
CC
voltage.
GPIO2 (Pin 7, LTC4302-1):
General Purpose Input/Out-
put. GPIO2 can be used as an input, an open-drain output,
or a push-pull output. The N-Channel MOSFET pulldown
device is capable of driving LED’s. When used in input or
open-drain output mode, the I/O pin can be pulled up to a
supply voltage ranging from 2.2V to 5.5V independent of
the V
CC
voltage.
V
CC2
(Pin 7, LTC4302-2):
Card Side Supply Voltage. This
pin is a power supply pin for the card side busses. Connect
V
CC2
to the card’s V
CC
and connect a bypass capacitor of
at least 0.01µF directly between V
CC2
and GND for best
results.
V
CC
(Pin 8):
Main Input Power Supply from Backplane.
Connect a bypass capacitor of at least 0.01µF directly
between V
CC
and GND for best results.
SCLOUT (Pin 9):
Serial Clock Output. Connect this pin to
the SCL bus on the I/O card. Do not float.
SDAOUT (Pin 10):
Serial Data Output. Connect this pin to
the SDA bus on the I/O card. Do not float.
TI I G DIAGRA
SDA
SCL
t
HD, STA
t
f
START
CONDITION
REPEATED START
CONDITION
STOP
CONDITION
W
U
U
UW
U
t
SU, DAT
t
HD, DATO,
t
HD, DATI
t
SU, STA
t
SP
t
HD, STA
t
SP
t
BUF
t
SU, STO
4302 TD01
START
CONDITION
sn430212 430212fs
5
51单片机
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