I/O card insertion into a live backplane without corruption
of the data and clock busses. When the connection is made,
the LTC4300A-3 provides bidirectional buffering, keeping
the backplane and card capacitances isolated. Rise time
accelerator circuitry allows the use of weaker DC pull-up
currents while still meeting rise time requirements. During
insertion, the SDA and SCL lines are precharged to 1V to
minimize bus disturbances.
The LTC4300A-3 provides level translation between
3.3V and 5V supplies. The backplane and card can both
be powered with supplies ranging from 2.7V to 5.5V.
The LTC4300A-3 also incorporates a CMOS threshold
ENABLE pin which forces the part into a low current mode
and isolates the card from the backplane. When driven to
V
CC
, the ENABLE pin sets normal operation.
The LTC4300A-3 is available in the MSOP and 3mm × 3mm
DFN packages.
L,
LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and
Hot Swap and ThinSOT are trademarks of Linear Technology Corporation. All other trademarks
are the property of their respective owners. *Patent pending.
n
n
n
n
n
■
■
■
Bidirectional Buffer* for SDA and SCL Lines
Increases Fanout
Prevents SDA and SCL Corruption During Live
Board Insertion and Removal From Backplane
Logic Threshold ENABLE Input
Isolates Input SDA and SCL Lines From Output
Compatible with I
2
C, I
2
C Fast Mode and SMBus
Standards (Up to 400kHz Operation)
1V Precharge on all SDA and SCL Lines
Supports Clock Stretching, Arbitration and
Synchronization
5V to 3.3V Level Translation
High Impedance SDA, SCL Pins for V
CC
= 0V,
V
CC2
= 0V
Small 8-Lead DFN and MSOP Packages
applicaTions
n
n
n
n
Hot Board Insertion
Servers
Capacitance Buffer/Bus Extender
Desktop Computer
Typical applicaTion
V
CC
3.3V
10k
SCLIN
10k
3
8
V
CC2
0.01µF
1
2
10k
10k
SCLOUT
OUTPUT
SIDE
50pF
0.5V/DIV
6
7
INPUT
SIDE
150pF
0.01µF
Input–Output Connection
SDAIN
SDAOUT
OFF ON
5
LTC4300A-3
ENABLE
GND
4
200ns/DIV
4300a3 TA01
4300a3 TA01b
4300a3fa
1
LTC4300A-3
absoluTe MaxiMuM raTings
(Note 1)
V
CC
to GND ..................................................– 0.3V to 7V
V
CC2
to GND ................................................. –0.3V to 7V
SDAIN, SCLIN, SDAOUT, SCLOUT................ –0.3V to 7V
ENABLE........................................................ –0.3V to 7V
Operating Temperature Range
LTC4300A-3C ......................................... 0°C to 70°C
LTC4300A-3I........................................–40°C to 85°C
Storage Temperature Range
MSOP ................................................ –65°C to 150°C
DFN.................................................... –65°C to 125°C
Lead Temperature (Soldering, 10 sec)
MSOP Only ....................................................... 300°C
pin conFiguraTion
TOP VIEW
V
CC2
SCLOUT
SCLIN
GND
1
2
3
4
9
8 V
CC
7 SDAOUT
6 SDAIN
5 ENABLE
V
CC2
SCLOUT
SCLIN
GND
1
2
3
4
TOP VIEW
8
7
6
5
V
CC
SDAOUT
SDAIN
ENABLE
DD PACKAGE
8-LEAD (3mm
×
3mm) PLASTIC DFN
T
JMAX
= 125°C,
θ
JA
= 43°C/W
EXPOSED PAD (PIN 9), PCB CONNECTION IS OPTIONAL
MS8 PACKAGE
8-LEAD PLASTIC MSOP
T
JMAX
= 125°C,
θ
JA
= 200°C/W
orDer inForMaTion
LEAD FREE FINISH
LTC4300A-3CDD#PBF
LTC4300A-3IDD#PBF
LTC4300A-3CMS8#PBF
LTC4300A-3IMS8#PBF
TAPE AND REEL
LTC4300A-3CDD#TRPBF
LTC4300A-3IDD#TRPBF
LTC4300A-3CMS8#TRPBF
LLTC4300A-3IMS8#TRPBF
PART MARKING*
LBHG
LBHG
LTBHD
LTBHF
PACKAGE DESCRIPTION
8-Lead (3mm
×
3mm) Plastic DFN
8-Lead (3mm
×
3mm) Plastic DFN
8-Lead Plastic MSOP
8-Lead Plastic MSOP
TEMPERATURE RANGE
0°C to 70°C
–40°C to 85°C
0°C to 70°C
–40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to:
http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to:
http://www.linear.com/tapeandreel/
4300a3fa
2
LTC4300A-3
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
CC
= 2.7V to 5.5V, V
CC2
= 2.7V to 5.5V, unless otherwise noted.
SYMBOL
Power Supply
V
CC
V
CC2
I
SD
I
VCC1
I
VCC2
V
PRE
t
IDLE
V
EN
V
DIS
I
EN
t
PHL
t
PLH
I
PULLUPAC
Positive Supply Voltage
Card Side Supply Voltage
Supply Current in Shutdown Mode
V
CC
Supply Current
V
CC2
Supply Current
Precharge Voltage
Bus Idle Time
ENABLE Threshold Voltage
Disable Threshold Voltage
ENABLE Input Current
ENABLE Delay, On-Off
ENABLE Delay, Off-On
Transient Boosted Pull-Up Current
Positive Transition on SDA, SCL, V
CC
= 2.7V,
V
CC2
= 2.7V, Slew Rate = 1.25V/µs (Note 2)
10k to V
CC
on SDA, SCL, V
CC
= 3.3V (Note 3),
V
CC2
= 3.3V, V
IN
= 0.2V
Guaranteed by Design, Not Subject to Test
Guaranteed by Design, Not Subject to Test
SDA, SCL Pins, I
SINK
= 3mA, V
CC
= 2.7V,
V
CC2
= 2.7V
SDA, SCL Pins = V
CC
= 5.5V, V
CC2
= 5.5V
(Note 4)
(Note 4)
(Note 4)
0
1.3
0.6
0.6
0.6
300
100
1.3
0.6
20 + 0.1 • C
B
20 + 0.1 • C
B
l
l
l
l
l
elecTrical characTerisTics
PARAMETER
CONDITIONS
MIN
2.7
2.7
TYP
MAX
5.5
5.5
UNITS
V
V
µA
mA
mA
V
µs
V
V
µA
ns
µs
mA
V
ENABLE
= 0V
V
SDAIN
= V
SCLIN
= 0V, V
CC1
= V
CC2
= 5.5V
V
SDAOUT
= V
SCLOUT
= 0V, V
CC1
= V
CC2
= 5.5V
SDA, SCL Floating
l
l
20
3
2.1
0.8
50
0.1 • V
CC
1.0
95
0.5 • V
CC
0.5 • V
CC
±0.1
10
95
1
2
±1
4.1
2.9
1.2
150
0.9 • V
CC
Start-Up Circuitry
ENABLE Pin
ENABLE from 0V to V
CC
Rise Time Accelerators
Input-Output Connection
V
OS
f
SCL, SDA
C
IN
V
OL
I
LEAK
f
I2C
t
BUF
t
hD,STA
t
su,STA
t
su,STO
t
hD, DAT
t
su, DAT
t
LOW
t
HIGH
t
f
t
r
t
PHL,SKEW
Input-Output Offset Voltage
Operating Frequency
Digital Input Capacitance
Output Low Voltage, Input = 0V
Input Leakage Current
I
2
C Operating Frequency
Bus Free Time Between Stop and
Start Condition
Hold Time After (Repeated) Start
Condition
Stop Condition Setup Time
Data Hold Time
Data Setup Time
Clock Low Period
Clock High Period
Clock, Data Fall Time
Clock, Data Rise Time
High-to-Low Propagation Delay
Skew, SCL-SDA
0
0
0
100
175
400
10
0.4
±5
400
mV
kHz
pF
V
µA
kHz
µs
µs
µs
µs
ns
ns
µs
µs
300
300
0
±75
ns
ns
ns
Timing Characteristics
Repeated Start Condition Setup Time (Note 4)
(Note 4)
(Note 4)
(Note 4)
(Note 4)
(Note 4)
(Notes 4, 5)
(Notes 4, 5)
V
CC
= 2.7V, V
CC2
= 5.5V;
V
CC
= 5.5V, V
CC2
= 2.7V (Note 6)
4300a3fa
3
LTC4300A-3
elecTrical characTerisTics
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2:
I
PULLUPAC
varies with temperature and V
CC
voltage, as shown in
the Typical Performance Characteristics section.
Note 3:
The connection circuitry always regulates its output to a higher
voltage than its input. The magnitude of this offset voltage as a function of
the pull-up resistor and V
CC
voltage is shown in the Typical Performance
Characteristics section.
Note 4:
Guaranteed by design, not subject to test.
Note 5:
C
B
= total capacitance of one bus line in pF.
Note 6:
These tests measure the difference in high-to-low propagation
delay t
PHL
between the clock and data channels. The delay on each
channel is measured from the 50% point of the falling driven input signal
to the 50% point of the output driven by the LTC4300A-3.The skew is
defined as (t
PHL(SCL)
- t
PHL(SDA)
). Testing is performed in both directions—
from input bus to output bus and vice versa. Tests are performed with
approximately 500pF of distributed equivalent capacitance on each SDA
and SCL pin.
Typical perForMance characTerisTics
5.3
5.2
5.1
5.0
t
PHL
(ns)
I
CC
(mA)
4.9
4.8
4.7
4.6
4.5
4.4
4.3
–50
–25
0
25
50
TEMPERATURE (°C)
75
100
V
CC
= 2.7V
60
I
CC
vs Temperature
100
V
CC
= 5.5V
80
Input–Output High to Low
Propagation Delay vs Temperature
12
V
CC
= 2.7V
10
I
PULLUPAC
(mA)
V
CC
= 3.3V
8
6
4
2
I
PULLUPAC
vs Temperature
V
CC
= 5V
40
V
CC
= 5.5V
V
CC
= 3V
20
C
IN
= C
OUT
= 100pF
R
PULLUPIN
= R
PULLUPOUT
= 10k
–25
0
25
50
TEMPERATURE (°C)
75
100
V
CC
= 2.7V
–25
0
25
50
TEMPERATURE (°C)
75
100
0
–50
0
–50
4300a3 G01
4300a3 G02
4300a3 G03
Connection Circuitry V
OUT
– V
IN
300
250
V
OUT
– V
IN
(mV)
200
150
100
50
0
V
CC
= 3.3V
I
SD
(µA)
T
A
= 25°C
V
IN
= 0V
35
30
25
20
15
10
5
0
10,000
20,000
30,000
R
PULLUP
( )
40,000
4300a3 G04
I
SD
vs Temperature
V
CC
= 5.5V
V
CC
= 5V
V
CC
= 2.7V
0
–50
–25
50
25
0
TEMPERATURE (°C)
75
100
4300a3 G05
4300a3fa
4
LTC4300A-3
pin FuncTions
(DFN/MSOP)
V
CC2
(Pin 1):
Card Supply Voltage. This is the supply
voltage for the devices on the card I
2
C busses. Connect
pull-up resistors from SDAOUT and SCLOUT to this pin.
Place a bypass capacitor of at least 0.01µF close to this
pin for best results.
SCLOUT (Pin 2):
Serial Clock Output. Connect this pin to
the SCL bus on the card.
SCLIN (Pin 3):
Serial Clock Input. Connect this pin to the
SCL bus on the backplane.
GND (Pin 4):
Device Ground. Connect this pin to a ground
plane for best results.
ENABLE (Pin 5):
Digital CMOS Threshold Input. Ground-
ing this pin puts the part in a low current mode. It also
disables the rise time accelerators, disables the bus
discharge circuitry, isolates SDAIN from SDOUT and
isolates SCLIN from SCLOUT. For active operation, drive
this pin to V
CC
. If this feature is unused, tie to V
CC
. Since
ENABLE is V
CC
referenced, do not connect to V
CC2
or
pull up to V
CC2
.
SDAIN (Pin 6):
Serial Data Input. Connect this pin to the
SDA bus on the backplane.
SDAOUT (Pin 7):
Serial Data Output. Connect this pin to
the SDA bus on the card.
V
CC
(Pin 8):
Main Input Power Supply from Backplane.
This is the supply voltage for the devices on the backplane
I
2
C busses. Connect pull-up resistors from SDAIN and
SCLIN to this pin. Place a bypass capacitor of at least
0.01µF close to this pin for best results.
Exposed Pad (Pin 9, DFN Package Only):
Exposed pad
may by be left open or connected to device ground.
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