HIGH-SPEED 3.3V
16K x 16 DUAL-PORT
STATIC RAM
.eatures
x
x
x
IDT70V261S/L
x
x
True Dual-Ported memory cells which allow simultaneous
access of the same memory location
High-speed access
– Commercial: 25/35/55ns (max.)
– Industrial: 25ns (max.)
Low-power operation
– IDT70V261S
Active: 300mW (typ.)
Standby: 3.3mW (typ.)
– IDT70V261L
Active: 300mW (typ.)
Standby: 660
µ
W (typ.)
Separate upper-byte and lower-byte control for multiplexed
x
x
x
x
x
x
x
x
bus compatibility
IDT70V261 easily expands data bus width to 32 bits or more
using the Master/Slave select when cascading more than
one device
M/S = V
IH
for
BUSY
output flag on Master
M/S = V
IL
for
BUSY
input on Slave
Interrupt Flag
On-chip port arbitration logic
Full on-chip hardware support of semaphore signaling
between ports
Fully asynchronous operation from either port
TTL-compatible, single 3.3V (±0.3V) power supply
Available in a 100-pin TQFP, Thin Quad Plastic Flatpack
Industrial temperature range (-40°C to +85°C) is available
for selected speed
.unctional Block Diagram
R/W
L
UB
L
R/W
R
UB
R
LB
L
CE
L
OE
L
LB
R
CE
R
OE
R
I/O
8L
-I/O
15L
I/O
0L
-I/O
7L
BUSY
L
(1,2)
I/O
Control
I/O
Control
I/O
8R
-I/O
15R
I/O
0R
-I/O
7R
BUSY
R
A
13R
A
0R
(1,2)
A
13L
A
0L
Address
Decoder
14
MEMORY
ARRAY
14
Address
Decoder
CE
L
OE
L
R/W
L
SEM
L
(2)
INT
L
NOTES:
1. (MASTER):
BUSY
is output; (SLAVE):
BUSY
is input.
2.
BUSY
and
INT
outputs are non-tri-stated push-pull.
ARBITRATION
INTERRUPT
SEMAPHORE
LOGIC
CE
R
OE
R
R/W
R
SEM
R
(2)
INT
R
3040 drw 01
M/S
DECEMBER 2001
1
DSC-3040/8
©2001 Integrated Device Technology, Inc.
IDT70V261S/L
High-Speed 16K x 16 Dual-Port Static RAM with Interrupt
Industrial and Commercial Temperature Ranges
Description
The IDT70V261 is a high-speed 16K x 16 Dual-Port Static RAM. The
IDT70V261 is designed to be used as a stand-alone 256K-bit Dual-Port
RAM or as a combination MASTER/SLAVE Dual-Port RAM for 32-bit-or-
more word systems. Using the IDT MASTER/SLAVE Dual-Port RAM
approach in 32-bit or wider memory system applications results in full-
speed, error-free operation without the need for additional discrete logic.
This device provides two independent ports with separate control,
address, and I/O pins that permit independent, asynchronous access for
reads or writes to any location in memory. An automatic power down
feature controlled by
CE
permits the on-chip circuitry of each port to enter
a very low standby power mode.
Fabricated using IDT’s CMOS high-performance technology, these
devices typically operate on only 300mW of power.
The IDT70V261 is packaged in a 100-pin Thin Quad Flatpack.
Pin Configurations
(1,2,3)
12/11/01
N/C
N/C
N/C
N/C
I/O
10L
I/O
11L
I/O
12L
I/O
13L
GND
I/O
14L
I/O
15L
V
CC
GND
I/O
0R
I/O
1R
I/O
2R
V
CC
I/O
3R
I/O
4R
I/O
5R
I/O
6R
N/C
N/C
N/C
N/C
1
2
3
4
5
6
7
8
9
100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76
75
74
73
72
71
70
69
68
67
66
I/O
9L
I/O
8L
I/O
7L
I/O
6L
I/O
5L
I/O
4L
I/O
3L
I/O
2L
GND
I/O
1L
I/O
0L
OE
L
V
CC
R/W
L
SEM
L
CE
L
UB
L
LB
L
A
13L
A
12L
A
11L
A
10L
A
9L
A
8L
A
7L
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
Index
IDT70V261PF
PN100-1
(4)
100-Pin TQFP
Top View
(5)
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
25
26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
N/C
N/C
N/C
A
6L
A
5L
A
4L
A
3L
A
2L
A
1L
A
0L
INT
L
BUSY
L
GND
M/S
BUSY
R
INT
R
A
0R
A
1R
A
2R
A
3R
A
4R
A
5R
N/C
N/C
N/C
3040 drw 02
,
NOTES:
1. All V
CC
pins must be connected to power supply.
2. All GND pins must be connected to ground supply.
3. Package body is approximately 14mm x 14mm x 1.4mm.
4. This package code is used to reference the package diagram.
5. This text does not indicate orientation of the actual part-marking.
I/O
7R
I/O
8R
I/O
9R
I/O
10R
I/O
11R
I/O
12R
I/O
13R
I/O
14R
GND
I/O
15R
OE
R
R/W
R
GND
SEM
R
CE
R
UB
R
LB
R
A
13R
A
12R
A
11R
A
10R
A
9R
A
8R
A
7R
A
6R
Pin Names
Left Port
CE
L
R/W
L
OE
L
A
0L
- A
13L
I/O
0L
- I/O
15L
SEM
L
UB
L
LB
L
BUSY
L
CE
R
R/W
R
OE
R
A
0R
- A
13R
I/O
0R
- I/O
15R
SEM
R
UB
R
LB
R
BUSY
R
M/S
V
CC
GND
Right Port
Chip Enable
Read/Write Enable
Output Enable
Address
Data Input/Output
Semaphore Enable
Upper Byte Select
Lower Byte Select
Busy Flag
Master or Slave Select
Power
Ground
3040 tbl 01
Names
6.42
2
IDT70V261S/L
High-Speed 16K x 16 Dual-Port Static RAM with Interrupt
Industrial and Commercial Temperature Ranges
Truth Table I: Non-Contention Read/Write Control
Inputs
(1)
CE
H
X
L
L
L
L
L
L
X
R/W
X
X
L
L
L
H
H
H
X
OE
X
X
X
X
X
L
L
L
H
UB
X
H
L
H
L
L
H
L
X
LB
X
H
H
L
L
H
L
L
X
SEM
H
H
H
H
H
H
H
H
X
I/O
8-15
High-Z
High-Z
DATA
IN
High-Z
DATA
IN
DATA
OUT
High-Z
DATA
OUT
High-Z
Outputs
I/O
0-7
High-Z
High-Z
High-Z
DATA
IN
DATA
IN
High-Z
DATA
OUT
DATA
OUT
High-Z
Mode
Deselected: Power-Down
Both Bytes Deselected: Power-Down
Write to Upper Byte Only
Write to Lower Byte Only
Write to Both Bytes
Read Upper Byte Only
Read Lower Byte Only
Read Both Bytes
Outputs Disabled
3040 tbl 02
NOTE:
1. A
0L
— A
13L
≠
A
0R
— A
13R
Truth Table II: Semaphore Read/Write Control
(1)
Inputs
(1)
CE
H
X
H
X
L
L
R/W
H
H
↑
↑
X
X
OE
L
L
X
X
X
X
UB
X
H
X
H
L
X
LB
X
H
X
H
X
L
SEM
L
L
L
L
L
L
I/O
8-15
DATA
OUT
DATA
OUT
DATA
IN
DATA
IN
____
____
Outputs
I/O
0-7
DATA
OUT
DATA
OUT
DATA
IN
DATA
IN
____
____
Mode
Read Data in Semaphore Flag
Read Data in Semaphore Flag
Write I/O
0
into Semaphore Flag
Write I/O
0
into Semaphore Flag
Not Allowed
Not Allowed
3040 tbl 03
NOTE:
1. There are eight semaphore flags written to via I/O
0
and read from all I/O's (I/O
0
-I/O
15
). These eight semaphores are addressed by A
0
-A
2
.
3
6.42
IDT70V261S/L
High-Speed 16K x 16 Dual-Port Static RAM with Interrupt
Industrial and Commercial Temperature Ranges
Absolute Maximum Ratings
(1)
Symbol
V
TERM
(2)
Rating
Terminal Voltage
with Respect
to GND
Temperature
Under Bias
Storage
Temperature
DC Output
Current
Commercial
& Industrial
-0.5 to +4.6
Unit
V
Maximum Operating Temperature
and Supply Voltage
(1)
Grade
Ambient Temperature
Commercial
0
O
C to +70
O
C
-40
O
C to +85
O
C
0V
0V
3.3V
+
0.3
3.3V
+
0.3
3040 tbl 05
GND
Vcc
T
BIAS
T
STG
I
OUT
-55 to +125
-65 to +150
50
o
C
C
Industrial
o
NOTES:
1. This is the parameter T
A
. This is the "instant on" case temperature.
mA
3040 tbl 04
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may
cause permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in
the operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect reliability.
2. V
TERM
must not exceed Vcc + 0.3V for more than 25% of the cycle time or 10ns
maximum, and is limited to < 20mA for the period of V
TERM
> Vcc + 0.3V.
Recommended DC Operating
Conditions
(2)
Symbol
V
CC
GND
V
IH
Parameter
Supply Voltage
Ground
Input High Voltage
Input Low Voltage
Min.
3.0
0
2.2
-0.3
(1)
Typ.
3.3
0
____
____
Max.
3.6
0
V
CC
+0.3
(2)
0.8
Unit
V
V
V
V
3040 tbl 06
Capacitance
(1)
(T
A
= +25°C, f = 1.0MHz)
Symbol
C
IN
C
OUT
Parameter
Input Capacitance
Output Capacitance
Conditions
(2)
V
IN
= 3dV
V
OUT
= 3dV
Max.
9
10
Unit
pF
pF
3040 tbl 07
V
IL
NOTES:
1. V
IL
> -1.5V for pulse width less than 10ns.
2. V
TERM
must not exceed Vcc + 0.3V.
NOTES:
1. This parameter is determined by device characterization but is not production
tested. TQFP package only.
2. 3dV represents the interpolated capacitance when the input and output signals
switch from 0V to 3V or from 3V to 0V.
DC Electrical Characteristics Over the Operating
Temperature and Supply Voltage Range
(V
CC
= 3.3V ± 0.3v)
70V261S
Symbol
|I
LI
|
|I
LO
|
V
OL
V
OH
Parameter
Input Leakage Current
(1)
Output Leakage Current
Output Low Voltage
Output High Voltage
Test Conditions
V
CC
= 3.6V, V
IN
= 0V to V
CC
CE
= V
IH
, V
OUT
= 0V to V
CC
I
OL
= +4mA
I
OH
= -4mA
Min.
___
70V261L
Min.
___
Max.
10
10
0.4
___
Max.
5
5
0.4
___
Unit
µA
µA
V
V
3040 tbl 08
___
___
___
___
2.4
2.4
NOTE:
1. At V
CC
= 2.0V, input leakages are undefined.
6.42
4
IDT70V261S/L
High-Speed 16K x 16 Dual-Port Static RAM with Interrupt
Industrial and Commercial Temperature Ranges
DC Electrical Characteristics Over the Operating
Temperature and Supply Voltage Range
(1)
(V
CC
= 3.3V ± 0.3V)
70V261X25
Com'l
& Ind
Symbol
I
CC
Parameter
Dynamic Operating
Current
(Both Ports Active)
Test Condition
CE
= V
IL
, Outputs Disabled
SEM
= V
IH
f = f
MAX
(3)
Version
COM'L
IND
COM'L
IND
COM'L
IND
COM'L
IND
COM'L
IND
S
L
S
L
S
L
S
L
S
L
S
L
S
L
S
L
S
L
S
L
Typ.
(2)
100
100
100
100
14
12
14
12
50
50
50
50
1.0
0.2
1.0
0.2
60
60
60
60
Max.
170
140
200
185
30
24
60
50
95
85
130
105
6
3
6
3
90
80
125
90
70V261X35
Com'l Only
Typ.
(2)
90
90
____
____
70V261X55
Com'l Only
Typ.
(2)
90
90
____
____
Max.
140
120
____
____
Max.
140
120
____
____
Unit
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
I
SB1
Standby Current
(Both Ports - TTL
Level Inputs)
CE
R
=
CE
L
= V
IH
SEM
R
=
SEM
L
= V
IH
f = f
MAX
(3)
12
10
____
____
30
24
____
____
12
10
____
____
30
24
____
____
I
SB2
Standby Current
(One Port - TTL
Level Inputs)
CE
"A"
= V
IL
and
CE
"B"
= V
IH
(5)
Active Port Outputs Disabled,
f=f
MAX
(3)
SEM
R
=
SEM
L
= V
IH
Both Ports
CE
L
and
CE
R
> V
CC
- 0.2V,
V
IN
> V
CC
- 0.2V or
V
IN
< 0.2V, f = 0
(4)
SEM
R
=
SEM
L
> V
CC
- 0.2V
CE
"A"
< 0.2V and
CE
"B"
> V
CC
- 0.2V
(5)
SEM
R
=
SEM
L
> V
CC
- 0.2V
V
IN
> V
CC
- 0.2V or V
IN
< 0.2V
Active Port Outputs Disabled,
f = f
MAX
(3)
45
45
____
____
87
75
____
____
45
45
____
____
87
75
____
____
I
SB3
Full Standby Current
(Both Ports -
CMOS Level Inputs)
1.0
0.2
____
____
6
3
____
____
1.0
0.2
____
____
6
3
____
____
I
SB4
Full Standby Current
(One Port -
CMOS Level Inputs)
55
55
____
____
85
74
____
____
55
55
____
____
85
74
____
____
NOTES:
1. 'X' in part number indicates power rating (S or L)
2. V
CC
= 3.3V, T
A
= +25°C, and are not production tested. I
CCDC
= 80mA (Typ.)
3. At f = f
MAX
,
address and control lines (except Output Enable) are cycling at the maximum frequency read cycle of 1/t
RC,
and using “AC Test Conditions” of input levels of
GND to 3V.
4. f = 0 means no address or control lines change.
5. Port "A" may be either left or right port. Port "B" is the opposite from port "A".
3040 tbl 09
5
6.42
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