MX23L12823A
FEATURES
128M-BIT FLASH-COMPATIBLE MASK ROM
(TSOP)
PIN DESCRIPTION
Symbol
A0~A22
D0~D14
D15/A-1
CE#
OE#
BYTE#
VCC
VSS
NC
Pin Function
Address Inputs
Data Outputs
D15 (Word Mode)/
LSB Address (Byte Mode)
Chip Enable Input
Output Enable Input
Word/ Byte Mode Selection
Power Supply Pin
Ground Pin
No Connection
• Bit organization
- 16M x 8 (byte mode)
- 8M x 16 (word mode)
• Fast access time
- Random access:100ns (max.)
- Page access:25ns (max.)
• Page size
- 8 words per page
• Current
- Operating:25mA
- Standby:15uA
• Supply voltage
- 2.7V ~ 3.6V
• Package
- 56 pin TSOP (14mm x 20mm), Pb-free, RoHS
- package pinout (read only) compatible to
S29GL128N's
• Temperature
- 0°C ~ 70°C
• Process
- 0.18um
PIN CONFIGURATION
56 TSOP (Top View)
NC
A22
A15
A14
A13
A12
A11
A10
A9
A8
A19
A20
NC
NC
A21
NC
NC
A18
A17
A7
A6
A5
A4
A3
A2
A1
NC
NC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
NC
NC
A16
BYTE#
VSS
D15/A-1
D7
D14
D6
D13
D5
D12
D4
V
CC
D11
D3
D10
D2
D9
D1
D8
D0
OE#
VSS
CE#
A0
NC
NC
ORDER INFORMATION
Part No.
MX23L12823ATC-10G
MX23L12823ATC-12G
P/N:PM1229
Speed
100ns
120ns
Package
56 pin TSOP
56 pin TSOP
Grade
Commercial
Commercial
Remark
Pb-free
Pb-free
REV. 1.1, DEC. 24, 2009
1
MX23L12823A
MODE SELECTION
CE#
H
L
L
L
OE#
X
H
L
L
Byte#
X
X
H
L
D15/A-1
X
X
Output
Input
D0~D7
High Z
High Z
D0~D7
D0~D7
D8~D15
High Z
High Z
D8~D15
High Z
Mode
-
-
Word
Byte
Power
Stand-by
Active
Active
Active
ABSOLUTE MAXIMUM RATINGS
Item
Symbol
Ratings
Voltage on any Pin Relative to VSS
VIN
-0.3V to 3.9V
Ambient Operating Temperature
Topr
0°C to 70°C
Storage Temperature
Tstg
-65°C to 125°C
Note:
1. Minimum voltage may undershoot to -2V during transition and for less than 20ns during transitions.
2. Maximum voltage may overshoot to Vcc+2V during transition and for less than 20ns during transitions.
DC CHARACTERISTICS (Ta = 0°C ~ 70°C, VCC = 2.7V~3.6V)
Item
Output High Voltage
Output Low Voltage
Input High Voltage
Input Low Voltage
Input Leakage Current
Output Leakage Current
Operating Current
Standby Current (CMOS)
Input Capacitance
Output Capacitance
Symbol
VOH
VOL
VIH
VIL
ILI
ILO
ICC
ISTB
CIN
COUT
MIN.
MAX. Conditions
2.4V
-
IOH = -400uA
-
0.4V
IOL = 1.6mA
0.7xVCC VCC+0.3
-0.3V
0.8V
-
5uA
0V, VCC
-
5uA
0V, VCC
f=5MHz, CE#=VIL, OE#=VIH
-
25mA
all output open
-
15uA
CE#>VCC-0.2V
-
10pF
Ta = 25°C, f = 1MHZ
-
10pF
Ta = 25°C, f = 1MHZ
AC CHARACTERISTICS (Ta = 0°C ~ 70°C, VCC = 2.7V~3.6V)
Item
Read Cycle Time
Address Access Time
Chip Enable Access Time
Page Access Time
Output Enable Time
Output Hold After Address
Output High Z Delay
Symbol
tRC
tAA
tCE
tPA
tOE
tOH
tHZ
23L12823A-10
MIN.
MAX.
100ns
-
-
100ns
-
100ns
-
25ns
-
25ns
0ns
-
-
20ns
23L12823A-12
MIN.
MAX.
120ns
-
-
120ns
-
120ns
-
25ns
-
25ns
0ns
-
-
20ns
Note:
1. Output high-impedance delay (tHZ) is measured from OE# or CE# going high, and this parameter guaranteed
by design over the full voltage and temperature operating range - not tested.
2. Operating current is measured under Non-Return to Zero (NRZ) test pattern.
P/N:PM1229
REV. 1.1, DEC. 24, 2009
2
MX23L12823A
AC Test Conditions
Input Pulse Levels
Input Rise and Fall Times
Input Timing Level
Output Timing Level
Output Load
0.4V~ 2.4V
5ns
1.5V
1.5V
See the Figure
TIMING DIAGRAM
RANDOM READ
Note: Output loading is not existing in test load board. Active
loading is used under software programming control. Output loading
capacitance includes load board's and all stray capacitance.
ADD
ADD
tCE
ADD
tRC
ADD
CE#
tOE
OE#
tAA
tOH
tHZ
DATA
VALID
VALID
VALID
PAGE READ
A3-A22
VALID ADD
(A-1),A0,A1,A2
1'st ADD
tAA
2'nd ADD
tPA
VALID
VALID
3'rd ADD
DATA
VALID
P/N:PM1229
REV. 1.1, DEC. 24, 2009
3
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