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HCS132HMSR

产品描述HC/UH SERIES, QUAD 2-INPUT NAND GATE, UUC16, DIE-16
产品类别逻辑    逻辑   
文件大小363KB,共8页
制造商Renesas(瑞萨电子)
官网地址https://www.renesas.com/
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HCS132HMSR概述

HC/UH SERIES, QUAD 2-INPUT NAND GATE, UUC16, DIE-16

HCS132HMSR规格参数

参数名称属性值
是否Rohs认证不符合
厂商名称Renesas(瑞萨电子)
零件包装代码DIE
包装说明DIE,
针数16
Reach Compliance Codenot_compliant
系列HC/UH
JESD-30 代码S-XUUC-N16
逻辑集成电路类型NAND GATE
功能数量4
输入次数2
端子数量16
封装主体材料UNSPECIFIED
封装代码DIE
封装形状SQUARE
封装形式UNCASED CHIP
峰值回流温度(摄氏度)NOT SPECIFIED
传播延迟(tpd)20 ns
认证状态Not Qualified
筛选级别MIL-PRF-38535 Class V
最大供电电压 (Vsup)5.5 V
最小供电电压 (Vsup)4.5 V
标称供电电压 (Vsup)5 V
表面贴装YES
技术CMOS
端子形式NO LEAD
端子位置UPPER
处于峰值回流温度下的最长时间NOT SPECIFIED
总剂量200k Rad(Si) V
Base Number Matches1

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DATASHEET
HCS132MS
Radiation Hardened Quad 2-Input NAND Schmitt Trigger
FN3061
Rev 1.00
August 1995
Features
• 3 Micron Radiation Hardened SOS CMOS
• Total Dose 200K RAD (Si)
• SEP Effective LET No Upsets: >100 MEV-cm
2
/mg
• Single Event Upset (SEU) Immunity < 2 x 10
-9
Errors/
Bit-Day (Typ)
• Dose Rate Survivability: >1 x 10
12
RAD (Si)/s
• Dose Rate Upset >10
10
RAD (Si)/s 20ns Pulse
• Cosmic Ray Upset Immunity < 2 x 10
-9
Errors/Gate Day
(Typ
• Latch-Up Free Under Any Conditions
• Military Temperature Range: -55
o
C to +125
o
C
• Significant Power Reduction Compared to LSTTL ICs
• DC Operating Voltage Range: 4.5V to 5.5V
• Input Logic Levels
- VIL = 30% of VCC Max
- VIH = 70% of VCC Min
• Input Current Levels Ii
5A at VOL, VOH
Pinouts
14 LEAD CERAMIC DUAL-IN-LINE
METAL SEAL PACKAGE (SBDIP)
MIL-STD-1835 CDIP2-T14
TOP VIEW
A1 1
B1 2
Y1 3
A2 4
B2 5
Y2 6
GND 7
14 VCC
13 B4
12 A4
11 Y4
10 B3
9 A3
8 Y3
14 LEAD CERAMIC METAL SEAL
FLATPACK PACKAGE (FLATPACK)
MIL-STD-1835 CDFP3-F14
TOP VIEW
A1
B1
1
2
3
4
5
6
7
14
13
12
11
10
9
8
VCC
B4
A4
Y4
B3
A3
Y3
Description
The Intersil HCS132MS is a Radiation Hardened Quad
2-Input NAND Schmitt Trigger inputs. A high on both inputs
forces the output to a Low state.
The HCS132MS utilizes advanced CMOS/SOS technology
to achieve high-speed operation. This device is a member of
radiation hardened, high-speed, CMOS/SOS Logic Family.
The HCS132MS is supplied in a 14 lead Ceramic flat-
pack (K suf fix) or a SBDIP Package (D suffix).
Y1
A2
B2
Y2
GND
TRUTH TABLE
INPUTS
An
L
Bn
L
H
L
H
OUTPUTS
Yn
H
H
H
L
Ordering Information
PART
NUMBER
HCS132DMSR
TEMPERATURE
RANGE
-55
o
C to +125
o
C
-55
o
C to +125
o
C
+25
o
C
+25
o
C
+25
o
C
SCREENING
LEVEL
Intersil Class
S Equivalent
Intersil Class
S Equivalent
Sample
PACKAGE
14 Lead SBDIP
L
H
H
NOTE: L = Logic Level Low, H = Logic level High
Functional Diagram
14 Lead Ceramic
Flatpack
14 Lead SBDIP
nA
(1, 4, 9, 12)
nY
HCS132KMSR
HCS132D/
Sample
HCS132K/
Sample
HCS132HMSR
Sample
14 Lead Ceramic
Flatpack
Die
(3, 6, 8, 11)
nO
(2, 5, 10, 13)
Die
FN3061 Rev 1.00
August 1995
Page 1 of 8
DB NA

 
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