VS6552
VGA Color CMOS Image Sensor Module
FEATURES
■
Small physical size
■
■
Ultra low power standby mode
SmOP (Small Optical Package) technology
featuring integrated lens
Class leading low light performance
VGA resolution sensor
Compatible with STV0974 companion mobile
processor
High frame rate to minimize image distortion
Low EMI link (VisionLink) to STV0974
On-chip 10-bit ADC
Automatic dark calibration
I
2
C communications
On-chip PLL
■
■
■
VS6552 offers an ultra low power standby mode
that consumes less than 15 µW.
The SmOP lens has been designed to combine
class leading low light performance with good
depth of field to ensure excellent overall optical
performance. The lens is a 2 element moulded
plastic design.
The output data and qualification clock are trans-
mitted over low noise, low voltage and fully differ-
ential links. VS6552 configuration registers are
controlled via a private I
2
C interface to STV0974.
APPLICATIONS
■
Mobile phone embedded camera system
■
■
■
■
■
■
■
■
PDA embedded camera or accessory camera
Wireless security camera
Table 1. Technical Specifications
Pixel resolution
Pixel size
Exposure control
Analog gain
Dynamic range
Signal to noise at
50cd.m
2
Supply voltage
Power consumption
644 x 484 (VGA)
5.6 µm x 5.6 µm
+81 dB
+24 dB (max)
60 dB (Typical)
37 dB (Typical)
2.8 V (analog supply)
1.8 V (digital supply)
<75 mW (@30 frame/s)
<15 µW (standby mode)
10.7mm x 8.7mm x
6mm:SmOP1.5
9.5mm x 8.5mm x 6.1mm
:SmOP2
45
o
HFOV, f# 2.8
14 pad SmOP
Socket or flexible circuit
DESCRIPTION
The VS6552 is a VGA resolution SmOP sensor
module. SmOP technology combines the image
sensor and fixed focus lens system in a single
module. This approach provides a number of ad-
vantages:
– SmOP technology is suitable for high volume
manufacturing
– SmOP can be plugged into a PCB mounted
flow soldered socket
– SmOP can be mounted close to noisy RF
source as differential signalling used to
transmit data has good immunity from radio
interference.
The sensor outputs raw Bayer colorized data to
the STV0974 companion mobile processor.
STV0974 then performs all color processing and
exposure control functions before outputting the
data in an appropriate interface format like YCbCr,
RGB or JPEG.
Package size
Lens
Package type
System attach
October 2004
Rev. 2
1/26
VS6552
Table 2. Order Codes
Part Number
VS6552V015/T2
VS6552V02C/T2
VS6552V02D/T2
Operating
Temperature
[ -25; +55 ] °C
[ -25; +55 ] °C
[ -25; +55 ] °C
Package
SmOP1.5
SmOP2M
SmOP2ME
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VS6552
TABLE OF CONTENT
Overview ........................................................................................................................................... 4
Sensor Overview
4
Signal Description ........................................................................................................................... 5
Functional Description .................................................................................................................... 6
Analog Video Block
6
Digital Video Block
6
Device Operating Modes
7
Power Management
7
Clock and Frame Rate Timing
8
Control and Video Interface Formats
9
Electrical Characteristics ................................................................................................................ 9
DC Electrical Characteristics
10
AC Electrical Characteristics
10
ESD Handling Characteristics
13
Optical specification...................................................................................................................... 13
Defect Categorization .................................................................................................................... 13
Pixel Defects
13
Package Mechanical Data ............................................................................................................. 13
SmOP1.5 Module Outline
13
SmOP2 M Module Outline
13
SmOP2 ME Module Outline
13
Application Information................................................................................................................. 23
Socket
23
EMC and Shielding
23
Revision History............................................................................................................................. 25
3/26
VS6552
1 OVERVIEW
1.1 Sensor Overview
The VS6552 VGA image sensor produces raw
VGA digital video data at up to 30 frames per sec-
ond. The image data is digitized using an internal
10-bit column ADC. The resulting 10-bit output
data includes embedded codes for synchroniza-
tion. The data is formatted and transmitted over a
fully differential link. The data is accompanied by a
qualifying clock that is transmitted over an identi-
cal fully differential link.
The sensor is fully configurable using an I
2
C inter-
face.
The sensor is optimized for high volume mobile
applications
1.1.1 Typical Application - Mobile Application
The VS6552 is an image sensor, it should be used
in conjunction with the STMicroelectronics
STV0974 companion processor. The coprocessor
and the sensor together form a complete imaging
system.
The sensors main function is to convert the viewed
scene into a data stream. The companion proces-
sor function is to manage the sensor so that it can
produce the best possible data and to process the
data stream into a form which is easily handled by
up stream mobile baseband or MMP chipsets.
The sensor supplies high speed clock signal to the
processor and provides the embedded control se-
quences which allow the co processor to synchro-
nize with the frame and line level timings. The
processor then performs the color processing on
the raw image data from the sensor before supply-
ing the final image data to the host.
Figure 1. Camera System Using STV0974
STV0974
VS6552
MSCL
MSDA
Pixel
Array
Digital Logic
PCLKP
PCLKN
PDATAP
PDATAN
Microprocessor
Interface Logic
SCL
SDA
DIO[0:13]
VP
VC
ADC
CLK
PDN
4/26
VS6552
2 SIGNAL DESCRIPTION
Table 3. Signal Description
Pad Number
Power supplies
1
2
3
8
11
System
4
5
Control
6
7
Data
9
10
12
13
Not connected
14
NC
Not connected
Not connected
PCLKN
PCLKP
PDATAN
PDATAP
vLVDS output
vLVDS output
vLVDS output
vLVDS output
Output qualifying clock
Output qualifying clock
Serial output data
Serial output data
MSCL
MSDA
I
I/O
Serial communication clock
Serial communication data
PDN
CLK
I
I
Power down control
b
System clock input
CEXT
AGND
AVDD
GND
VDD
PWR
PWR
PWR
PWR
PWR
Connection to capacitor
a
Analog ground
Analog power
Digital ground
Digital power
Pad Name
I/O Type
Description
a.Internally generated voltage that needs to be externally decoupled with a 100 nF, 5 V capacitor
b.Signal is active low
Note: The physical position of the signals on the package can be found by refering to the pinout information in Chapter 7: Package Mechan-
ical Data.
5/26
FPGA/CPLD
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