PCS CDMA Upconverter/Driver
1710 - 1910 MHz
MD59-0062
Features
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Functional Schematic
MIX OUT
LO IN
GND
GND
GND
Highly integrated upconverter and driver
Operates with supply voltages from 2.7 V to 5 V
+7 dBm output power at 56 dBc ACPR
Low current mode for power saving at low output
power
Balanced IF input (265
Ω)
Low LO drive level, -10 dBm
Operates in the US and Korean PCS bands
Miniature 4-mm plastic FQFP-N package
20
GND
LOA VDD
GND
1
DRVR IN
GND
DRVR VDD1
GND
DRVR SRC
Description
M/A-COM’s MD59-0062 is a fully integrated upconverter /
driver IC that includes an IF amplifier, upconverting mixer,
two stage driver amplifier and LO buffer in a miniature 4
mm plastic FQFP-N package.
The MD59-0062 is ideally suited for CDMA handset
transmitters that require high linearity and low power
consumption.
M/A-COM fabricates the MD59-0062 using an 0.5 micron
low noise GaAs MESFET process. The process features
full passivation for performance and reliability.
GND
IF+ VDD
Pin Configuration
PIN No.
1
2
PIN Name
GND
LOA V
DD
GND
GND
IF+ V
DD
IF+ IN
Description
DC and RF ground
LO amplifier supply voltage. Bypassing
required.
DC and RF ground
DC and RF ground
IF+ supply voltage. Off chip inductor and IF
bypassing required.
IF+ input port. Off chip matching elements
required.
IF– input port. Off chip matching elements
required.
IF– supply voltage. Off chip inductor and IF
bypassing required.
Driver amplifier second stage supply voltage.
Must be RF bypassed.
50
Ω
output of driver amplifier
Source bias voltage of driver output stage.
Requires RF bypassing and may be used to
control output stage current.
DC and RF ground
Driver amplifier first stage supply voltage.
Must be RF bypassed.
DC and RF ground
50
Ω
input to driver amplifier.
DC and RF ground
50
Ω
output of mixer
DC and RF ground
Local oscillator input (-10 to +5 dBm)
DC and RF ground
3
Absolute Maximum Ratings
Parameter
VDD
IF Input Level
LO In Power
Operating Temperature
Storage Temperature
1
4
5
Absolute Maximum
6 Volts
0 dBm
0 dBm
-55°C to +100°C
-65°C to +150°C
9
DRVR V
DD2
DRVR OUT
DRVR SRC
7
IF– IN
6
8
IF– V
DD
1. Exceeding any one or combination of these limits may
cause permanent damage.
10
11
12
13
14
15
16
17
18
19
20
GND
DRVR V
DD1
GND
DRVR IN
GND
MIX OUT
GND
LO IN
GND
DRVR OUT
DRV VDD2
IF+ IN
IF- VDD
IF- IN
PCS CDMA Upconverter/Driver, 1710 - 1910 MHz
Electrical Specifications: V
DD
= 3.0V, T
A
= 25°C
Parameter
Complete Upconverter
1
/High Power Mode
Conversion Gain
CDMA Linear Output Power
2
Noise Figure
I
DD
V
SWR
(All Ports)
IF Input Impedance
LO-to-RF Port Leakage
Complete Upconverter
1
/Low Power Mode
Conversion Gain
CDMA Linear Output Power
Noise Figure
I
DD
V
SWR
(All Ports)
IF Input Impedance
LO-to-RF Port Leakage
V
CTRL
= Logic Low (0 Volts)
RF Frequency = 1710 - 1910 MHz
LO Frequency = 1580 - 1780 MHz
LO Power = -10 dBm
IF = 130 MHz
Ohms
dBm
dB
dBm
dB
mA
V
CTRL
= Logic High (V
DD
)
RF Frequency = 1710 - 1910 MHz
LO Frequency = 1580 - 1780 MHz
LO Power = -10 dBm
IF = 130 MHz
Ohms
dBm
mA
dB
dBm
Test Conditions
Units
Min.
MD59-0062
V 2.00
Typ.
Max.
24
7
10
66
1.5:1
265
-18
22
0
10
46
1.5:1
265
-18
1. Complete upconverter / driver measurements taken with a surface mount SAW filter between mixer output and driver input.
2. CDMA linear power is defined as 56 dBc ACPR at a 1.228 MHz offset from the carrier frequency
Specifications subject to change without notice.
n
North America:
Tel. (800) 366-2266, Fax (800) 618-8883
n
Asia/Pacific:
Tel.+81-44-844-8296, Fax +81-44-844-8298
n
Europe:
Tel. +44 (1344) 869 595, Fax+44 (1344) 300 020
Visit www.macom.com for additional data sheets and product information.
2
PCS CDMA Upconverter/Driver, 1710 - 1910 MHz
Operating Instructions
The MD59-0062 is a highly integrated MMIC
upconverter / driver for the 1710 - 1910 MHz PCS band.
The upconverter/driver provides exceptional RF
performance while consuming low DC current and is
packaged in a low cost plastic package. It is ideal for
lightweight battery operated portable radio systems.
The transmit chain consists of a balanced IF amplifier,
balanced mixer with single-ended RF output, and a two
stage RF driver amplifier as shown in the block diagram.
The user must add surface mount resistors, inductors and
capacitors in conjunction with the IC to optimize the
trade-offs among performance, tunability and ease of use.
A schematic on page 4 shows the IC and required off-chip
components.
An off-chip self-bias resistor R1 with an RF bypass
capacitor allows the current in the driver amplifier to be
varied to obtain the required linear output power. By
placing a bipolar transistor in series with the self-bias
resistor, you can dynamically switch the current draw in
the driver to provide high and low power operating modes.
In high power mode, the bipolar transistor is on and the
driver output stage is self-biased through R1 to provide +7
dBm of linear output power. By switching off the bipolar
transistor, the output stage is biased through the higher
resistance R2 thus reducing the current by ~25 mA to give
0 dBm of linear output power.
An external filter is required between the mixer output and
driver amplifier input to reduce the amplitude of the image
and local oscillator signals coming out of the mixer. This
filter should have a 50
Ω
input and output impedance.
The mixer is a balanced resistive FET mixer that provides
exceptional linearity and isolation with low loss and no
DC current.
The IFA input ports are externally matched to 265 ohm
differential impedance using two off-chip capacitors and
an off chip inductor. This allows maximum flexibility of
intermediate frequency and IF filter. The IFA output ports
are matched to the mixer using off chip inductors, which
are also used for DC bias injection. A matching network
such as that shown below can be used to match both the
input and output of the IFA at the required frequency. The
inductor also acts as a choke for the DC supply line.
The LO input port is matched on-chip to 50 ohms. An LO
buffer amplifier boosts the -10 dBm input signal to the
level required to drive the mixer. The converter reaches
optimum performance with a drive level of -5 dBm.
MD59-0062
V 2.00
All DC supply lines must be properly bypassed at RF
frequencies to obtain optimum performance and at
lower frequency to maintain unconditional stability.
Capacitors C1, C3, C8 are RF bypass capacitors for the
LO amplifier and the driver amplifier. The value and
placement of these capacitors is critical in determining
the frequency response of these amplifiers. Capacitor
C10 is a source bypass capacitor for the second stage of
the driver amplifier. The placement of this capacitor
will affect the gain of the amplifier. For best
performance, place all the RF bypass capacitors as
shown in the PCB drawing on the previous page.
Capacitors C2, C4, C5 and C9 are 1000 pF low
frequency DC supply bypass capacitors. Their values
and placement are less critical than the other capacitors.
However, for best results, place these capacitor as close
to the package leads as possible.
Specifications subject to change without notice.
n
North America:
Tel. (800) 366-2266, Fax (800) 618-8883
n
Asia/Pacific:
Tel.+81-44-844-8296, Fax +81-44-844-8298
n
Europe:
Tel. +44 (1344) 869 595, Fax+44 (1344) 300 020
Visit www.macom.com for additional data sheets and product information.
4
PCS CDMA Upconverter/Driver, 1710 - 1910 MHz
Typical Performance Curves
Korean PCS Band
Conversion Gain vs. Frequency
LO = -10 dBm, -5 dBm, V
DD
= 3.0V
28
27
26
-5 dBm
25
GAIN (dB)
24
23
22
21
20
19
18
1.74
1.75
1.76
1.77
RF FREQUENCY (GHz)
1.78
1.79
Low Power Mode
-5 dBm
-10 dBm
High Power Mode
-10 dBm
DD
MD59-0062
V 2.00
US PCS Band
Conversion Gain vs. Frequency
LO = -10
=
dBm, -5 dBm, V
DD
3.0
3.0V
=
V
LO -10 dBm, -5 dBm, V =
28
27
-5 dBm
DD
26
25
GAIN (dB)
High Power Mode
-10 dBm
24
23
22
21
20
19
18
1.84
1.85
1.86
1.87
1.88
1.89
RF FREQUENCY (GHz)
1.9
1.91
Low Power Mode
-5 dBm
-10 dBm
28
27
26
Conversion Gain vs. Frequency
V
DD
= 2.8V, 3.0V, 3.3V, LO = -10 dBm
DD
3.0 V
3.3 V
2.8 V
High Power Mode
28
27
Conversion Gain vs. Frequency
V
DD
= 2.8V, 3.0V,
DD
3.3V, LO = -10 dBm
High Power Mode
VDD = 3.3 V
26
25
GAIN (dB)
24
VDD = 3.3 V
VDD = 2.8 V
VDD = 3.0 V
25
GAIN (dB)
24
23
22
21
20
19
18
1.74
1.75
1.76
1.77
Low Power Mode
3.3 V
23
22
21
20
19
18
Low Power Mode
VDD = 2.8 V
VDD = 3.0 V
3.0 V
2.8 V
1.78
1.79
1.84
1.85
1.86
RF FREQUENCY (GHz)
1.87
1.88
1.89
RF FREQUENCY (GHz)
1.9
1.91
-10
-12
-14
-16
LEAKAGE (dBm)
-18
-20
-22
-24
-26
-28
-30
LO-to-RF Leakage vs. Frequency
LO = -10 dBm, -5 dBm, V
DD
= 3.0V
DD
-10
-12
-14
-16
LEAKAGE (dBm)
-18
-20
-22
-24
LO-to-RF Leakage vs. Frequency
LO = -10
=
dBm, -5 dBm, V
DD
3.0 V
LO -10 dBm, -5 dBm, V
DD
=
= 3.0V
-5 dBm
-5 dBm
-10 dBm
-10 dBm
-26
-28
-30
1.74
1.75
1.76
1.77
RF FREQUENCY (GHz)
1.78
1.79
1.83
1.84
1.85
1.86
1.87
1.88
1.89
1.9
1.91
1.92
1.93
RF FREQUENCY (GHz)
Specifications subject to change without notice.
n
North America:
Tel. (800) 366-2266, Fax (800) 618-8883
n
Asia/Pacific:
Tel.+81-44-844-8296, Fax +81-44-844-8298
n
Europe:
Tel. +44 (1344) 869 595, Fax+44 (1344) 300 020
Visit www.macom.com for additional data sheets and product information.
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