INTEGRATED CIRCUITS
74F399
Quad 2-port register
Product specification
Supersedes data of 1999 Jan 08
IC15 Data Handbook
2000 Jun 30
Philips
Semiconductors
Philips Semiconductors
Product specification
Quad 2-port register
74F399
FEATURES
•
Select inputs from two data sources
•
Fully positive edge-triggered
DESCRIPTION
The 74F399 is the logical equivalent of a quad 2-input multiplexer
feeding into four edge-triggered flip-flops. A common Select input
determines which of two 4-bit words is accepted. The selected data
enters the flip-flops on the rising edge of the clock.
The 74F399 is a high speed quad 2-port register. They select 4 bits
of data from either of two sources (Ports) under control of a common
select input (S). The selected data is transferred to a 4-bit output
register synchronous with the Low-to-High transition of the Clock
input (CP). The 4-bit D-type output register is fully edge-triggered.
The Data inputs (I0n, I1n) and Select input (S) must be stable only a
setup time prior to and hold time after the Low-to-High transition of
the Clock input for predictable operation.
TYPICAL SUPPLY CURRENT
(TOTAL)
22mA
ORDERING INFORMATION
DESCRIPTION
16-pin plastic DIP
16-pin plastic SO
COMMERCIAL RANGE
V
CC
= 5V
±10%,
T
amb
= 0°C to +70°C
N74F399N
N74F399D
PKG DWG #
SOT38-4
SOT109-1
PIN CONFIGURATION
S
Qa
I0a
I1a
I1b
I0b
Qb
GND
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
CC
Qd
I0d
I1d
I1c
I0c
Qc
CP
TYPE
74F399
TYPICAL f
MAX
120MHz
SF00951
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS
I0a, I0b, I0c, I0d
I1a, I1b, I1c, I1d
S
CP
Qa, Qb, Qc, Qd
DESCRIPTION
Data inputs from source 0
Data inputs from source 1
Common Select input
Clock input (active rising edge)
Register true outputs
74F (U.L.)
HIGH/LOW
1.0/1.0
1.0/1.0
1.0/1.0
1.0/1.0
50/33
LOAD VALUE
HIGH/LOW
20µA/0.6mA
20µA/0.6mA
20µA/0.6mA
20µA/0.6mA
1.0mA/20mA
NOTE:
One (1.0) FAST unit load is defined as: 20µA in the High state and 0.6mA in the Low state.
LOGIC SYMBOL
3
4
6
5
11
12
14
13
IEC/IEEE SYMBOL (IEEE/IEC)
1
I0a
S
CP
I1a
I0b
I1b
I0c
I1c
I0d
I1d
9
3
4
6
5
Qa
Qb
Qc
Qd
11
12
2
V
CC
= Pin 16
GND = Pin 8
7
10
15
14
13
G1
C1
1, 2D
1, 2D
MUX
1
9
2
7
10
15
SF00952
SF00953
2000 Jun 30
2
853–0028 24024
Philips Semiconductors
Product specification
Quad 2-port register
74F399
FUNCTION TABLE
INPUTS
CP
"
"
"
"
S
l
l
h
h
I0n
l
h
X
X
I1n
X
X
l
h
OUTPUTS
Qn
L
H
L
H
H = High voltage level
h = High voltage level one setup time prior to the High-to-Low
clock transition
L = Low voltage level
l = Low voltage level one setup time prior to the High-to-Low
clock transition
X = Don’t care
"
= Low-to-High clock transition
LOGIC DIAGRAM
S
1
I0a
I1a
3
4
D
2
Qa
CP
I0b
I1b
6
5
D
7
Qb
CP
11
12
D
10
Qc
I0c
I1c
CP
14
13
9
D
15
Qd
I0d
I1d
CP
V
CC
= Pin 16
GND = Pin 8
CP
SF00954
2000 Jun 30
3
Philips Semiconductors
Product specification
Quad 2-port register
74F399
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limits set forth in this table may impair the useful life of the device.
Unless otherwise noted these limits are over the operating free-air temperature range.)
SYMBOL
V
CC
V
IN
I
IN
V
OUT
I
OUT
T
amb
T
stg
Supply voltage
Input voltage
Input current
Voltage applied to output in High output state
Current applied to output in Low output state
Operating free-air temperature range
Storage temperature range
PARAMETER
RATING
–0.5 to +7.0
–0.5 to +7.0
–30 to +5
–0.5 to +V
CC
40
0 to +70
–65 to +150
UNIT
V
V
mA
V
mA
°C
°C
RECOMMENDED OPERATING CONDITIONS
LIMITS
SYMBOL
V
CC
V
IH
V
IL
I
IK
I
OH
I
OL
T
amb
Supply voltage
High-level input voltage
Low-level input voltage
Input clamp current
High-level output current
Low-level output current
Operating free-air temperature range
0
PARAMETER
MIN
4.5
2.0
0.8
–18
–1
20
70
NOM
5.0
MAX
5.5
V
V
V
mA
mA
mA
°C
UNIT
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.)
SYMBOL
PARAMETER
TEST CONDITIONS
1
V
CC
= MIN, V
IL
= MAX,
,
,
V
IH
= MIN, I
OH
= MAX
V
CC
= MIN, V
IL
= MAX,
,
,
V
IH
= MIN, I
OL
= MAX
V
CC
= MIN, I
I
= I
IK
V
CC
= MAX, V
I
= 7.0V
V
CC
= MAX, V
I
= 2.7V
V
CC
= MAX, V
I
= 0.5V
V
CC
= MAX
V
CC
= MAX
–60
22
±10%V
CC
±5%V
CC
±10%V
CC
±5%V
CC
LIMITS
MIN
2.5
2.7
3.4
0.30
0.30
–0.73
0.50
0.50
–1.2
100
20
–0.6
–150
34
TYP
2
MAX
UNIT
V
V
V
V
V
µA
µA
mA
mA
mA
V
O
OH
High-level
High level output voltage
V
O
OL
V
IK
I
I
I
IH
I
IL
I
OS
I
CC
Low-level
Low level output voltage
Input clamp voltage
Input current at maximum input voltage
High-level input current
Low-level input current
Short-circuit output current
3
Supply current (total)
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
2. All typical values are at V
CC
= 5V, T
amb
= 25°C.
3. Not more than one output should be shorted at a time. For testing I
OS
, the use of high-speed test apparatus and/or sample-and-hold
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting
of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any
sequence of parameter tests, I
OS
tests should be performed last.
2000 Jun 30
4
Philips Semiconductors
Product specification
Quad 2-port register
74F399
AC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL
PARAMETER
TEST
CONDITION
V
CC
= +5V
T
amb
= +25°C
C
L
= 50pF, R
L
= 500Ω
MIN
f
MAX
t
PLH
t
PHL
Maximum clock frequency
Propagation delay
CP to Qn or Qn
Waveform 1
Waveform 1
100
3.0
3.0
TYP
120
5.7
6.5
7.5
8.5
MAX
V
CC
= +5V
±
10%
T
amb
= 0°C to +70°C
C
L
= 50pF, R
L
= 500Ω
MIN
90
3.0
3.0
8.5
9.0
MAX
MHz
ns
UNIT
AC SETUP REQUIREMENTS
LIMITS
SYMBOL
PARAMETER
TEST
CONDITION
V
CC
= +5V
T
amb
= +25°C
C
L
= 50pF, R
L
= 500Ω
MIN
t
s
(H)
t
s
(L)
t
h
(H)
t
h
(L)
t
s
(H)
t
s
(L)
t
h
(H)
t
h
(L)
t
W
(H)
t
W
(L)
Setup time, High or Low
I0n, I1n to CP
Hold time, High or Low
I0n, I1n to CP
Setup time, High or Low
S to CP
Hold time, High or Low
S to CP
CP Pulse width
High or Low
Waveform 2
Waveform 2
Waveform 2
Waveform 2
Waveform 1
3.0
3.0
1.0
1.0
7.5
7.5
0
0
4.0
6.0
TYP
MAX
V
CC
= +5V
±
10%
T
amb
= 0°C to +70°C
C
L
= 50pF, R
L
= 500Ω
MIN
3.0
3.0
1.0
1.0
8.5
8.5
0
0
4.0
6.0
MAX
ns
ns
ns
ns
ns
UNIT
AC WAVEFORMS
For all waveforms, V
M
= 1.5V.
The shaded areas indicate when the input is permitted to change for predictable output performance.
1/f
MAX
I0n, I1n, S
CP
V
M
t
w
(H)
t
PLH
t
w
(L)
t
PHL
CP
V
M
V
M
V
M
V
M
t
s
(H)
V
M
t
h
(H)
V
M
t
s
(L)
V
M
t
h
(L)
Qn, Qn
V
M
V
M
SF00956
Waveform 2. Data and Select Setup and Hold Times
SF00955
Waveform 1. Propagation Delay, Clock Input to Output,
Clock Pulse Width, and Maximum Clock Frequency
2000 Jun 30
5
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