74HC27-Q100; 74HCT27-Q100
Triple 3-input NOR gate
Rev. 1 — 3 June 2013
Product data sheet
1. General description
The 74HC27-Q100; 74HCT27-Q100 is a triple 3-input NOR gate. Inputs include clamp
diodes. This enables the use of current limiting resistors to interface inputs to voltages in
excess of V
CC
.
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from
40 C
to +85
C
and from
40 C
to +125
C
Complies with JEDEC standard JESD7A
Input levels:
For 74HC27-Q100: CMOS level
For 74HCT27-Q100: TTL level
ESD protection:
MIL-STD-883, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0
)
3. Ordering information
Table 1.
Ordering information
Package
Temperature range Name
74HC27D-Q100
74HCT27D-Q100
74HC27PW-Q100
74HCT27PW-Q100
74HC27BQ-Q100
74HCT27BQ-Q100
40 C
to +125
C
40 C
to +125
C
TSSOP14
40 C
to +125
C
SO14
Description
plastic small outline package; 14 leads; body width
3.9 mm
plastic thin shrink small outline package; 14 leads;
body width 4.4 mm
Version
SOT108-1
SOT402-1
Type number
DHVQFN14 plastic dual in-line compatible thermal enhanced very SOT762-1
thin quad flat package; no leads; 14 terminals;
body 2.5
3
0.85 mm
NXP Semiconductors
74HC27-Q100; 74HCT27-Q100
Triple 3-input NOR gate
4. Functional diagram
1
2
1
2
13
3
4
5
9
10
11
1A
1B
1C
2A
2B
2C
3A
3B
3C
mna936
≥
1
12
1Y
12
13
3
4
≥
1
6
2Y
6
5
9
A
≥
1
8
B
C
Y
3Y
8
10
11
mna935
mna937
Fig 1. Logic symbol
Fig 2. IEC logic symbol
Fig 3. Logic diagram (one gate)
5. Pinning information
5.1 Pinning
(1) This is not a supply pin. The substrate is attached to this
pad using conductive die attach material. There is no
electrical or mechanical requirement to solder this pad.
However, if it is soldered, the solder land should remain
floating or be connected to GND.
Fig 4. Pin configuration SO14, TSSOP14
Fig 5. Pin configuration DHVQFN14
74HC_HCT27_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 1 — 3 June 2013
2 of 15
NXP Semiconductors
74HC27-Q100; 74HCT27-Q100
Triple 3-input NOR gate
5.2 Pin description
Table 2.
Symbol
1A, 2A, 3A
1B, 2B, 3B
1C, 2C, 3C
1Y, 2Y, 3Y
GND
V
CC
Pin description
Pin
1, 3, 9
2, 4, 10
13, 5, 11
12, 6, 8
7
14
Description
data input
data input
data input
data output
ground (0 V)
supply voltage
6. Functional description
Table 3.
Inputs
nA
L
X
X
H
[1]
Function table
[1]
Outputs
nB
L
X
H
X
nC
L
H
X
X
nY
H
L
L
L
H = HIGH voltage level; L = LOW voltage level; X = don’t care.
7. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
V
CC
I
IK
I
OK
I
O
I
CC
I
GND
T
stg
P
tot
Parameter
supply voltage
input clamping current
output clamping current
output current
supply current
ground current
storage temperature
total power dissipation
SO14, TSSOP14 and DHVQFN14
packages
[2]
Conditions
V
I
<
0.5
V or V
I
> V
CC
+ 0.5 V
V
O
<
0.5
V or V
O
> V
CC
+ 0.5 V
0.5
V < V
O
< V
CC
+ 0.5 V
[1]
[1]
Min
0.5
-
-
-
-
50
65
-
Max
+7
20
20
25
50
-
+150
500
Unit
V
mA
mA
mA
mA
mA
C
mW
[1]
[2]
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
For SO14 package: P
tot
derates linearly with 8 mW/K above 70
C.
For TSSOP14 package: P
tot
derates linearly with 5.5 mW/K above 60
C.
For DHVQFN14 package: P
tot
derates linearly with 4.5 mW/K above 60
C.
74HC_HCT27_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 1 — 3 June 2013
3 of 15
NXP Semiconductors
74HC27-Q100; 74HCT27-Q100
Triple 3-input NOR gate
8. Recommended operating conditions
Table 5.
Recommended operating conditions
Voltages are referenced to GND (ground = 0 V)
Symbol Parameter
V
CC
V
I
V
O
T
amb
t/V
supply voltage
input voltage
output voltage
ambient temperature
input transition rise and fall rate
V
CC
= 2.0 V
V
CC
= 4.5 V
V
CC
= 6.0 V
Conditions
74HC27-Q100
Min
2.0
0
0
40
-
-
-
Typ
5.0
-
-
+25
-
1.67
-
Max
6.0
V
CC
V
CC
+125
625
139
83
74HCT27-Q100
Min
4.5
0
0
40
-
-
-
Typ
5.0
-
-
+25
-
1.67
-
Max
5.5
V
CC
V
CC
+125
-
139
-
V
V
V
C
ns/V
ns/V
ns/V
Unit
9. Static characteristics
Table 6.
Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
74HC27-Q100
V
IH
HIGH-level
input voltage
V
CC
= 2.0 V
V
CC
= 4.5 V
V
CC
= 6.0 V
V
IL
LOW-level
input voltage
V
CC
= 2.0 V
V
CC
= 4.5 V
V
CC
= 6.0 V
V
OH
HIGH-level
V
I
= V
IH
or V
IL
output voltage
I
O
=
20 A;
V
CC
= 2.0 V
I
O
=
20 A;
V
CC
= 4.5 V
I
O
=
20 A;
V
CC
= 6.0 V
I
O
=
4.0
mA; V
CC
= 4.5 V
I
O
=
5.2
mA; V
CC
= 6.0 V
V
OL
LOW-level
V
I
= V
IH
or V
IL
output voltage
I
O
= 20
A;
V
CC
= 2.0 V
I
O
= 20
A;
V
CC
= 4.5 V
I
O
= 20
A;
V
CC
= 6.0 V
I
O
= 4.0 mA; V
CC
= 4.5 V
I
O
= 5.2 mA; V
CC
= 6.0 V
I
I
I
CC
input leakage
current
V
I
= V
CC
or GND;
V
CC
= 6.0 V
1.5
3.15
4.2
-
-
-
1.9
4.4
5.9
1.2
2.4
3.2
0.8
2.1
2.8
2.0
4.5
6.0
-
-
-
0.5
1.35
1.8
-
-
-
-
-
0.1
0.1
0.1
0.26
0.26
0.1
2.0
1.5
3.15
4.2
-
-
-
1.9
4.4
5.9
3.84
5.34
-
-
-
-
-
-
-
-
-
-
0.5
1.35
1.8
-
-
-
-
-
0.1
0.1
0.1
0.33
0.33
1.0
20
1.5
3.15
4.2
-
-
-
1.9
4.4
5.9
3.7
5.2
-
-
-
-
-
-
-
-
-
-
0.5
1.35
1.8
-
-
-
-
-
0.1
0.1
0.1
0.4
0.4
1.0
40
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
A
A
Conditions
Min
25
C
Typ
Max
40 C
to +85
C 40 C
to +125
C
Unit
Min
Max
Min
Max
3.98 4.32
5.48 5.81
-
-
-
-
-
-
-
0
0
0
0.15
0.16
-
-
supply current V
I
= V
CC
or GND; I
O
= 0 A;
V
CC
= 6.0 V
74HC_HCT27_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 1 — 3 June 2013
4 of 15
NXP Semiconductors
74HC27-Q100; 74HCT27-Q100
Triple 3-input NOR gate
Table 6.
Static characteristics
…continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
C
I
input
capacitance
HIGH-level
input voltage
LOW-level
input voltage
V
CC
= 4.5 V to 5.5 V
V
CC
= 4.5 V to 5.5 V
Conditions
Min
-
25
C
Typ
3.5
Max
-
40 C
to +85
C 40 C
to +125
C
Unit
Min
-
Max
-
Min
-
Max
-
pF
74HCT27-Q100
V
IH
V
IL
V
OH
2.0
-
1.6
1.2
-
0.8
2.0
-
-
0.8
2.0
-
-
0.8
V
V
HIGH-level
V
I
= V
IH
or V
IL
; V
CC
= 4.5 V
output voltage
I
O
=
20 A
I
O
=
4.0
mA
LOW-level
V
I
= V
IH
or V
IL
; V
CC
= 4.5 V
output voltage
I
O
= 20
A
I
O
= 4.0 mA
input leakage
current
V
I
= V
CC
or GND;
V
CC
= 5.5 V
4.4
4.5
-
-
0.1
0.26
0.1
2.0
4.4
3.84
-
-
-
-
-
-
0.1
0.33
1.0
20
4.4
3.7
-
-
-
-
-
-
0.1
0.4
1.0
40
V
V
V
V
A
A
3.98 4.32
-
-
-
-
0
0.16
-
-
V
OL
I
I
I
CC
I
CC
supply current V
I
= V
CC
or GND;
V
CC
= 5.5 V; I
O
= 0 A
additional
per input pin;
supply current V
I
= V
CC
2.1 V;
other inputs at V
CC
or GND;
V
CC
= 4.5 V to 5.5 V;
I
O
= 0 A
nA, nB or nC inputs
-
-
150
3.5
540
-
-
-
675
-
-
-
735
-
A
pF
C
I
input
capacitance
74HC_HCT27_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 1 — 3 June 2013
5 of 15
stm32/stm8
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