74AHC1GU04-Q100
Inverter
Rev. 1 — 21 November 2012
Product data sheet
1. General description
The 74AHC1GU04-Q100 is a high-speed Si-gate CMOS device. It provides an inverting
single stage function.
The AHC device has CMOS input switching levels and supply voltage range 2 V to 5.5 V.
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from
40 C
to +85
C
and from
40 C
to +125
C
Symmetrical output impedance
High noise immunity
Low power dissipation
Balanced propagation delays
ESD protection:
MIL-STD-883, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0
)
3. Ordering information
Table 1.
Ordering information
Package
Temperature range Name
74AHC1GU04GW-Q100
40 C
to +125
C
74AHC1GU04GV-Q100
40 C
to +125
C
TSSOP5
SC-74A
Description
plastic thin shrink small outline package;
5 leads; body width 1.25 mm
plastic surface-mounted package; 5 leads
Version
SOT353-1
SOT753
Type number
4. Marking
Table 2.
Marking codes
Marking
AD
AU4
Type number
74AHC1GU04GW-Q100
74AHC1GU04GV-Q100
NXP Semiconductors
74AHC1GU04-Q100
Inverter
5. Functional diagram
2
A
Y
4
2
1
mna044
4
A
Y
mna045
mna043
Fig 1.
Logic symbol
Fig 2.
IEC logic symbol
Fig 3.
Logic diagram
6. Pinning information
6.1 Pinning
$+&*84
QF
$
*1'
DDD
9
&&
<
Fig 4.
Pin configuration
6.2 Pin description
Table 3.
Symbol
n.c.
A
GND
Y
V
CC
Pin description
Pin
1
2
3
4
5
Description
not connected
data input
ground (0 V)
data output
supply voltage
7. Functional description
Table 4.
Function table
H = HIGH voltage level; L = LOW voltage level
Input
A
L
H
Output
Y
H
L
74AHC1GU04_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 1 — 21 November 2012
2 of 13
NXP Semiconductors
74AHC1GU04-Q100
Inverter
8. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
V
CC
I
IK
V
I
I
OK
I
O
I
CC
I
GND
T
stg
P
tot
[1]
[2]
Parameter
supply voltage
input clamping current
input voltage
output clamping current
output current
supply current
ground current
storage temperature
total power dissipation
Conditions
V
I
<
0.5
V
[1]
Min
0.5
20
0.5
-
-
-
75
65
Max
+7.0
-
+7.0
20
25
75
-
+150
250
Unit
V
mA
V
mA
mA
mA
mA
C
mW
V
O
<
0.5
V or V
O
> V
CC
+ 0.5 V
0.5
V < V
O
< V
CC
+ 0.5 V
T
amb
=
40 C
to +125
C
[2]
-
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
For both TSSOP5 and SC-74A packages: above 87.5
C
the value of P
tot
derates linearly with 4.0 mW/K.
9. Recommended operating conditions
Table 6.
Recommended operating conditions
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
V
CC
V
I
V
O
T
amb
t/V
supply voltage
input voltage
output voltage
ambient temperature
input transition rise and fall rate
V
CC
= 3.3 V
0.3 V
V
CC
= 5.0 V
0.5 V
Conditions
Min
2.0
0
0
40
-
-
Typ
5.0
-
-
+25
-
-
Max
5.5
5.5
V
CC
+125
100
20
Unit
V
V
V
C
ns/V
ns/V
10. Static characteristics
Table 7.
Static characteristics
Voltages are referenced to GND (ground = 0 V).
Symbol
V
IH
Parameter
HIGH-level
input voltage
Conditions
Min
V
CC
= 2.0 V
V
CC
= 3.0 V
V
CC
= 5.5 V
V
IL
LOW-level
input voltage
V
CC
= 2.0 V
V
CC
= 3.0 V
V
CC
= 5.5 V
1.7
2.4
4.4
-
-
-
-
-
-
-
-
-
25
C
Typ
Max
-
-
-
0.3
0.6
1.1
40 C
to +85
C
Min
1.7
2.4
4.4
-
-
-
-
-
-
0.3
0.6
1.1
Max
40 C
to +125
C
Unit
Min
1.7
2.4
4.4
-
-
-
-
-
-
0.3
0.6
1.1
Max
V
V
V
V
V
V
74AHC1GU04_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 1 — 21 November 2012
3 of 13
NXP Semiconductors
74AHC1GU04-Q100
Inverter
Table 7.
Static characteristics
…continued
Voltages are referenced to GND (ground = 0 V).
Symbol
V
OH
Parameter
Conditions
Min
HIGH-level
V
I
= V
IH
or V
IL
output voltage
I
O
=
50 A;
V
CC
= 2.0 V
I
O
=
50 A;
V
CC
= 3.0 V
I
O
=
50 A;
V
CC
= 4.5 V
1.9
2.9
4.4
25
C
Typ
2.0
3.0
4.5
-
-
0
0
0
-
-
- -
- -
- 1.5
Max
-
-
-
-
-
0.1
0.1
0.1
0.36
0.36
0.1
1.0
10
40 C
to +85
C
Min
1.9
2.9
4.4
2.48
3.8
-
-
-
-
-
-
-
-
-
-
-
-
-
0.1
0.1
0.1
0.44
0.44
1.0
10
10
Max
40 C
to +125
C
Unit
Min
1.9
2.9
4.4
2.40
3.70
-
-
-
-
-
-
-
-
-
-
-
-
-
0.1
0.1
0.1
0.55
0.55
2.0
40
10
Max
V
V
V
V
V
V
V
V
V
V
A
A
pF
I
O
=
4.0
mA; V
CC
= 3.0 V 2.58
I
O
=
8.0
mA; V
CC
= 4.5 V 3.94
V
OL
LOW-level
V
I
= V
IH
or V
IL
output voltage
I
O
= 50
A;
V
CC
= 2.0 V
I
O
= 50
A;
V
CC
= 3.0 V
I
O
= 50
A;
V
CC
= 4.5 V
I
O
= 4.0 mA; V
CC
= 3.0 V
I
O
= 8.0 mA; V
CC
= 4.5 V
I
I
I
CC
C
I
input leakage
current
V
I
= 5.5 V or GND;
V
CC
= 0 V to 5.5 V
-
-
-
-
-
supply current V
I
= V
CC
or GND; I
O
= 0 A;
V
CC
= 5.5 V
input
capacitance
11. Dynamic characteristics
Table 8.
Dynamic characteristics
GND = 0 V; t
r
= t
f
=
3.0 ns. For test circuit see
Figure 6.
Symbol
t
pd
Parameter
propagation
delay
Conditions
Min
A to Y; see
Figure 5
V
CC
= 3.0 V to 3.6 V
C
L
= 15 pF
C
L
= 50 pF
V
CC
= 4.5 V to 5.5 V
C
L
= 15 pF
C
L
= 50 pF
C
PD
power
dissipation
capacitance
per buffer;
V
I
= GND to V
CC
[4]
[3]
[1]
[2]
25
C
Typ
Max
40 C
to +85
C 40 C
to +125
C
Unit
Min
Max
Min
Max
-
-
-
-
-
3.4
4.9
2.6
3.6
14
7.1
10.6
5.5
7.0
-
1.0
1.0
1.0
1.0
-
8.5
12.0
6.0
8.0
-
1.0
1.0
1.0
1.0
-
10.0
13.5
7.0
9.0
-
ns
ns
ns
ns
pF
[1]
[2]
[3]
[4]
t
pd
is the same as t
PLH
and t
PHL
.
Typical values are measured at V
CC
= 3.3 V.
Typical values are measured at V
CC
= 5.0 V.
C
PD
is used to determine the dynamic power dissipation P
D
(W).
P
D
= C
PD
V
CC2
f
i
+
(C
L
V
CC2
f
o
) where:
f
i
= input frequency in MHz;
74AHC1GU04_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 1 — 21 November 2012
4 of 13
NXP Semiconductors
74AHC1GU04-Q100
Inverter
f
o
= output frequency in MHz;
C
L
= output load capacitance in pF;
V
CC
= supply voltage in Volts.
12. Waveforms
A input
V
M(1)
VI
V
CC
t
PHL
t
PLH
PULSE
GENERATOR
VO
DUT
RT
CL
50 pF
Y output
V
M(1)
mna046
mna034
V
M
= 0.5
V
CC
; V
I
= GND to V
CC
.
Test data is given in
Table 8.
Definitions for test circuit:
C
L
= Load capacitance including jig and probe
capacitance.
R
T
= Termination resistance should be equal to output
impedance Z
o
of the pulse generator.
Fig 5.
The input (A) to output (Y) propagation delay
times
Fig 6.
Load circuitry for switching times
13. Typical transfer characteristics
mna397
mna398
2.0
V
O
(V)
1.6
V
O
1.0
I
CC
(mA)
0.8
3.0
V
O
(V)
V
O
10
I
CC
(mA)
8
1.2
0.6
1.5
6
0.8
0.4
4
I
D
(drain current)
0.4
I
D
(drain current)
0.2
2
0
0
0.4
0.8
1.2
1.6
V
I
(V)
0
2.0
0
0
1
2
3
0
V
I
(V)
Fig 7.
V
CC
= 2.0 V; I
O
= 0 A
Fig 8.
V
CC
= 3.0 V; I
O
= 0 A
74AHC1GU04_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 1 — 21 November 2012
5 of 13
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