74HC1GU04-Q100
Inverter
Rev. 1 — 21 August 2012
Product data sheet
1. General description
The 74HC1GU04-Q100 is a high-speed Si-gate CMOS device. It provides an inverting
single stage function.
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from
40 C
to +85
C
and from
40 C
to +125
C
Symmetrical output impedance
Wide operating voltage range from 2.0 V to 6.0 V
Low power dissipation
Balanced propagation delays
ESD protection:
MIL-STD-883, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0
)
SOT353-1 and SOT753 package options
3. Ordering information
Table 1.
Ordering information
Package
Temperature range Name
74HC1GU04GW-Q100
74HC1GU04GV-Q100
40 C
to +125
C
40 C
to +125
C
TSSOP5
SC-74A
Description
plastic thin shrink small outline package;
5 leads; body width 1.25 mm
plastic surface-mounted package; 5 leads
Version
SOT353-1
SOT753
Type number
4. Marking
Table 2.
Marking codes
Marking code
[1]
HD
HU4
Type number
74HC1GU04GW-Q100
74HC1GU04GV-Q100
[1]
The pin 1 indicator is located on the lower left corner of the device, below the marking code.
NXP Semiconductors
74HC1GU04-Q100
Inverter
5. Functional diagram
2
A
Y
4
2
1
mna044
4
A
Y
mna045
mna043
Fig 1.
Logic symbol
Fig 2.
IEC logic symbol
Fig 3.
Logic diagram
6. Pinning information
6.1 Pinning
+&*84
QF
$
*1'
DDD
9
&&
<
Fig 4.
Pin configuration
6.2 Pin description
Table 3.
Symbol
n.c.
A
GND
Y
V
CC
Pin description
Pin
1
2
3
4
5
Description
not connected
data input
ground (0 V)
data output
supply voltage
7. Functional description
Table 4.
Function table
H = HIGH voltage level; L = LOW voltage level
Input
A
L
H
Output
Y
H
L
74HC1GU04_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 1 — 21 August 2012
2 of 13
NXP Semiconductors
74HC1GU04-Q100
Inverter
8. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
V
CC
I
IK
I
OK
I
O
I
CC
I
GND
T
stg
P
tot
[1]
[2]
Parameter
supply voltage
input clamping current
output clamping current
output current
supply current
ground current
storage temperature
total power dissipation
Conditions
V
I
<
0.5
V or V
I
> V
CC
+ 0.5 V
V
O
<
0.5
V or V
O
> V
CC
+ 0.5 V
0.5
V < V
O
< V
CC
+ 0.5 V
[1]
[1]
[1]
Min
0.5
-
-
-
-
25
65
Max
+7.0
20
20
12.5
25
-
+150
200
Unit
V
mA
mA
mA
mA
mA
C
mW
T
amb
=
40 C
to +125
C
[2]
-
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
Above 55
C,
the value of P
tot
derates linearity with 2.5 mW/K.
9. Recommended operating conditions
Table 6.
Recommended operating conditions
Voltages are referenced to GND (ground = 0 V).
Symbol
V
CC
V
I
V
O
T
amb
t/V
Parameter
supply voltage
input voltage
output voltage
ambient temperature
input transition rise and fall
rate
V
CC
= 2.0 V
V
CC
= 4.5 V
V
CC
= 6.0 V
Conditions
Min
2.0
0
0
40
-
-
-
Typ
5.0
-
-
+25
-
-
-
Max
6.0
V
CC
V
CC
+125
625
139
83
Unit
V
V
V
C
ns/V
ns/V
ns/V
10. Static characteristics
Table 7.
Static characteristics
Voltages are referenced to GND (ground = 0 V). All typical values are measured at T
amb
= 25
C.
Symbol
V
IH
Parameter
HIGH-level input
voltage
Conditions
V
CC
= 2.0 V
V
CC
= 4.5 V
V
CC
= 6.0 V
V
IL
LOW-level input
voltage
V
CC
= 2.0 V
V
CC
= 4.5 V
V
CC
= 6.0 V
40 C
to +85
C
Min
1.7
3.6
4.8
-
-
-
Typ
1.4
2.6
3.4
0.6
1.9
2.6
-
-
-
0.3
0.9
1.2
Max
40 C
to +125
C
Min
1.7
3.6
4.8
-
-
-
-
-
-
0.3
0.9
1.2
Max
V
V
V
V
V
V
Unit
74HC1GU04_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 1 — 21 August 2012
3 of 13
NXP Semiconductors
74HC1GU04-Q100
Inverter
Table 7.
Static characteristics
…continued
Voltages are referenced to GND (ground = 0 V). All typical values are measured at T
amb
= 25
C.
Symbol
V
OH
Parameter
HIGH-level output
voltage
Conditions
V
I
= V
IH
or V
IL
I
O
=
20 A;
V
CC
= 2.0 V
I
O
=
20 A;
V
CC
= 4.5 V
I
O
=
20 A;
V
CC
= 6.0 V
I
O
=
2.0
mA; V
CC
= 4.5 V
I
O
=
2.6
mA; V
CC
= 6.0 V
V
OL
LOW-level output
voltage
V
I
= V
IH
or V
IL
I
O
= 20
A;
V
CC
= 2.0 V
I
O
= 20
A;
V
CC
= 4.5 V
I
O
= 20
A;
V
CC
= 6.0 V
I
O
= 2.0 mA; V
CC
= 4.5 V
I
O
= 2.6 mA; V
CC
= 6.0 V
I
I
I
CC
C
I
input leakage current
supply current
input capacitance
V
I
= V
CC
or GND; V
CC
= 6.0 V
V
I
= V
CC
or GND; I
O
= 0 A;
V
CC
= 6.0 V
-
-
-
-
-
-
-
0
0
0
0.15
0.16
-
-
- 5
0.2
0.5
0.5
0.33
0.33
1.0
10
-
-
-
-
-
-
-
-
-
0.2
0.5
0.5
0.4
0.4
1.0
20
-
V
V
V
V
V
A
A
pF
1.8
4.0
5.5
4.13
5.63
2.0
4.5
6.0
4.32
5.81
-
-
-
-
-
1.8
4.0
5.5
3.7
5.2
-
-
-
-
-
V
V
V
V
V
40 C
to +85
C
Min
Typ
Max
40 C
to +125
C
Min
Max
Unit
11. Dynamic characteristics
Table 8.
Dynamic characteristics
GND = 0 V; t
r
= t
f
= 6.0 ns; For test circuit see
Figure 6.
All typical values are measured at T
amb
= 25
C.
Symbol Parameter
t
pd
Conditions
[1]
40 C
to +85
C
Min
Typ
10
7
6
5
14
Max
90
18
15
-
-
40 C
to +125
C
Unit
Min
-
-
-
-
-
Max
105
21
18
-
-
ns
ns
ns
ns
pF
propagation delay A to Y; see
Figure 5
V
CC
= 2.0 V; C
L
= 50 pF
V
CC
= 4.5 V; C
L
= 50 pF
V
CC
= 6.0 V; C
L
= 50 pF
V
CC
= 5.0 V; C
L
= 15 pF
-
-
-
-
[2]
C
PD
power dissipation V
I
= GND to V
CC
capacitance
t
pd
is the same as t
PLH
and t
PHL
.
C
PD
is used to determine the dynamic power dissipation P
D
(W).
P
D
= C
PD
V
CC2
f
i
+
(C
L
V
CC2
f
o
) where:
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
C
L
= output load capacitance in pF;
V
CC
= supply voltage in Volts.
-
[1]
[2]
74HC1GU04_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 1 — 21 August 2012
4 of 13
NXP Semiconductors
74HC1GU04-Q100
Inverter
12. Waveforms
A input
V
M(1)
VI
V
CC
t
PHL
t
PLH
PULSE
GENERATOR
VO
DUT
RT
CL
50 pF
Y output
V
M(1)
mna046
mna034
V
M(1)
= 0.5
V
CC
; V
I
= GND to V
CC
.
Test data is given in
Table 8.
DUT = Device Under Test
C
L
= Load capacitance including jig and probe
capacitance.
R
T
= Termination resistance should be equal to output
impedance Z
o
of the pulse generator.
Fig 5.
Input to output propagation delays
Fig 6.
Test circuit for measuring switching times
13. Typical transfer characteristics
mna047
mna048
1
2
10
5
I
CC
(mA)
V
O
(V)
I
CC
(mA)
V
O
(V)
0.5
1
5
2.5
0
0
1
V
I
(V)
2
0
0
0
2.5
V
I
(V)
5
0
Fig 7.
V
CC
= 2.0 V; I
O
= 0 A
Fig 8.
V
CC
= 4.5 V; I
O
= 0 A
74HC1GU04_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 1 — 21 August 2012
5 of 13
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