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PHT2010Y2341BG

产品描述RESISTOR, THIN FILM, 0.1 W, 0.1 %, 25 ppm, 2340 ohm, SURFACE MOUNT, 2010, CHIP, GREEN
产品类别无源元件    电阻器   
文件大小92KB,共6页
制造商Vishay(威世)
官网地址http://www.vishay.com
标准  
下载文档 详细参数 全文预览

PHT2010Y2341BG概述

RESISTOR, THIN FILM, 0.1 W, 0.1 %, 25 ppm, 2340 ohm, SURFACE MOUNT, 2010, CHIP, GREEN

PHT2010Y2341BG规格参数

参数名称属性值
是否无铅不含铅
是否Rohs认证符合
Objectid1016478407
包装说明SMT, 2010
Reach Compliance Codeunknown
ECCN代码EAR99
YTEOL7.27
其他特性HIGH PRECISION
构造Chip
JESD-609代码e4
制造商序列号PHT
安装特点SURFACE MOUNT
端子数量2
最高工作温度215 °C
最低工作温度-55 °C
封装高度0.5 mm
封装长度5.08 mm
封装形状RECTANGULAR PACKAGE
封装形式SMT
封装宽度2.54 mm
包装方法WAFFLE PACK
额定功率耗散 (P)0.1 W
电阻2340 Ω
电阻器类型FIXED RESISTOR
系列PHT
尺寸代码2010
表面贴装YES
技术THIN FILM
温度系数25 ppm/°C
端子面层Gold (Au) - with Nickel (Ni) barrier
端子形状WRAPAROUND
容差0.1%
工作电压300 V

文档预览

下载PDF文档
PHT
www.vishay.com
Vishay Sfernice
High Stability - High Temperature (230 °C)
Thin Film Wraparound Chip Resistors
FEATURES
• Operating temperature range:
- 55 °C; + 215 °C
• Storage temperature: - 55 °C; + 230 °C
• Gold terminations (< 1 μm thick)
• 5 sizes available (0402, 0603, 0805, 1206,
2010); other sizes upon request
• Temperature coefficient down to 15 ppm
(- 55 °C; + 215 °C)
• Tolerance down to 0.05 %
• Load life stability: 0.35 % max. after 2000 h at 220 °C
(ambient) at Pn
• Shelf life stability: 0.7 % typ. (1 % max.) after 15 000 h at
230 °C
• SMD wraparound
• 0.02 % upon request
• TCR remains constant after long term storage at 230 °C
(15 000 h)
• Material categorization: For definitions of compliance
please see
www.vishay.com/doc?99912
INTRODUCTION
For applications such as down hole applications, the need
for parts able to withstand very severe conditions
(temperature as high as 215 °C powered or up to 230 °C
un-powered) has leaded Vishay Sfernice to push out the
limit of the thin film technology.
Designers might read the application note: Power
Dissipation Considerations in High Precision Vishay
Sfernice Thin Film Chip Resistors and Arrays
(P, PRA etc…) (High Temperature Application)
www.vishay.com/doc?53047
in conjunction with this
datasheet to help them to properly design their PCBs and
get the best performances of the PHT.
Vishay Sfernice R&D engineers will be willing to support any
customer design considerations.
STANDARD ELECTRICAL SPECIFICATIONS
MODEL
PHT0402
PHT0603
PHT0805
PHT1206
PHT2010
SIZE
0402
0603
0805
1206
2010
RESISTANCE
RANGE
10 to 130K
10 to 320K
10 to 720K
10 to 2.7M
10 to 7.5M
RATED POWER
(1)(2)
P
215 °C
W
0.0189
0.0375
0.06
0.1
0.2
(4)
LIMITING ELEMENT
VOLTAGE
V
50
75
150
200
300
TOLERANCE
±%
0.05, 0.1, 0.5, 1
0.05, 0.1, 0.5, 1
0.05, 0.1, 0.5, 1
0.05, 0.1, 0.5, 1
0.05, 0.1, 0.5, 1
TEMPERATURE
COEFFICIENT
(3)
± ppm/°C
10, 15, 25, 30, 50, 55
10, 15, 25, 30, 50, 55
10, 15, 25, 30, 50, 55
10, 15, 25, 30, 50, 55
10, 15, 25, 30, 50, 55
Notes
(1)
For power handling improvement, please refer to application note 53047: Power Dissipation Considerations in High Precision Vishay
Sfernice Thin Film Chip Resistors and Arrays (High Temperature Applications)
www.vishay.com/doc?/53047
and consult Vishay Sfernice
(2)
See Table 2 on next page
(3)
See Table 1 on next page
(4)
It is possible to dissipate up to 0.3 W, but there will be an additional drift of 0.1 % after load life
CLIMATIC SPECIFICATIONS
Operating temperature range
Storage temperature range
- 55 °C; + 215 °C
- 55 °C; + 230 °C
MECHANICAL SPECIFICATIONS
Substrate
Resistive Element
Passivation
Protection
Terminations
Alumina
Nichrome (NiCr)
Silicon nitride (Si
3
N
4
)
Epoxy + Silicone
Gold (< 1 μm) over nickel barrier
Note
• For other terminations, please consult
Revision: 11-Feb-13
Document Number: 53050
1
For technical questions, contact:
sferthinfilm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
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