74LVC126A
Quad buffer/line driver with 5 V tolerant input/outputs; 3-state
Rev. 8 — 8 April 2014
Product data sheet
1. General description
The 74LVC126A consists of four non-inverting buffers/line drivers with 3-state outputs,
which are controlled by the output enable input (nOE). A LOW at nOE causes the outputs
to assume a high-impedance OFF-state.
Inputs can be driven from either 3.3 V or 5 V devices. When disabled, up to 5.5 V can be
applied to the outputs.
2. Features and benefits
5 V tolerant inputs/outputs for interfacing with 5 V logic
Wide supply voltage range from 1.2 V to 3.6 V
CMOS low power consumption
Direct interface with TTL levels
Complies with JEDEC standard:
JESD8-7A (1.65 V to 1.95 V)
JESD8-5A (2.3 V to 2.7 V)
JESD8-C/JESD36 (2.7 V to 3.6 V)
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115B exceeds 200 V
CDM JESD22-C101E exceeds 1000 V
Specified from
40 C
to +85
C
and
40 C
to +125
C
3. Ordering information
Table 1.
Ordering information
Package
Temperature range
74LVC126AD
74LVC126ADB
40 C
to +125
C
40 C
to +125
C
Name
SO14
SSOP14
TSSOP14
Description
plastic small outline package; 14 leads;
body width 3.9 mm
plastic shrink small outline package; 14 leads;
body width 5.3 mm
plastic thin small outline package; 14 leads;
body width 4.4 mm
Version
SOT108-1
SOT337-1
SOT402-1
SOT762-1
Type number
74LVC126APW
40 C
to +125
C
74LVC126ABQ
40 C
to +125
C
DHVQFN14 plastic dual in-line compatible thermal enhanced very
thin quad flat package; no leads; 14 terminals;
body 2.5
3
0.85 mm
NXP Semiconductors
74LVC126A
Quad buffer/line driver with 5 V tolerant input/outputs; 3-state
4. Functional diagram
2
1
5
4
9
10
12
13
1A
1OE
1Y
3
2
1
EN1
6
4
1
3
2A
2OE
3A
3OE
4A
4OE
2Y
6
5
3Y
8
9
8
10
4Y
11
12
11
13
mna235
mna236
Fig 1.
Logic symbol
Fig 2.
IEC logic symbol
nA
nY
nOE
mna234
Fig 3.
Logic diagram
5. Pinning information
5.1 Pinning
1OE
2
3
4
5
6
7
GND
1
terminal 1
index area
1A
1Y
2OE
2A
2Y
14 V
CC
13 4OE
12 4A
11 4Y
10 3OE
9
3Y
8
3A
126
GND
(1)
001aac983
Transparent top view
(1) This is not a supply pin. The substrate is attached to this
pad using conductive die attach material. There is no
electrical or mechanical requirement to solder this pad.
However, if it is soldered, the solder land should remain
floating or be connected to GND.
Fig 4.
74LVC126A
Pin configuration for SO14 and (T)SSOP14
Fig 5.
Pin configuration for DHVQFN14
© NXP Semiconductors N.V. 2014. All rights reserved.
All information provided in this document is subject to legal disclaimers.
Product data sheet
Rev. 8 — 8 April 2014
2 of 16
NXP Semiconductors
74LVC126A
Quad buffer/line driver with 5 V tolerant input/outputs; 3-state
5.2 Pin description
Table 2.
Symbol
1OE
1A
1Y
2OE
2A
2Y
GND
3Y
3A
3OE
4Y
4A
4OE
V
CC
Pin description
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Description
data enable input (active HIGH)
data input
data output
data enable input (active HIGH)
data input
data output
ground (0 V)
data output
data input
data enable input (active HIGH)
data output
data input
data enable input (active HIGH)
supply voltage
6. Functional description
Table 3.
Inputs
nOE
H
H
L
[1]
H = HIGH voltage level
L = LOW voltage level
X = don’t care
Z = high-impedance OFF-state
Function selection
[1]
Output
nA
L
H
X
nY
L
H
Z
7. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
V
CC
I
IK
V
I
I
OK
V
O
I
O
74LVC126A
Parameter
supply voltage
input clamping current
input voltage
output clamping current
output voltage
output current
Conditions
V
I
< 0 V
[1]
Min
0.5
50
0.5
-
[2]
[2]
Max
+6.5
-
+6.5
50
V
CC
+ 0.5
+6.5
50
Unit
V
mA
V
mA
V
V
mA
V
O
> V
CC
or V
O
< 0 V
output HIGH or LOW-state
output 3-state
V
O
= 0 V to V
CC
All information provided in this document is subject to legal disclaimers.
0.5
0.5
-
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 8 — 8 April 2014
3 of 16
NXP Semiconductors
74LVC126A
Quad buffer/line driver with 5 V tolerant input/outputs; 3-state
Table 4.
Limiting values
…continued
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
I
CC
I
GND
T
stg
P
tot
[1]
[2]
[3]
Parameter
supply current
ground current
storage temperature
total power dissipation
Conditions
Min
-
100
[3]
Max
100
-
+150
500
Unit
mA
mA
C
mW
65
-
T
amb
=
40 C
to +125
C
The minimum input voltage ratings may be exceeded if the input current ratings are observed.
The output voltage ratings may be exceeded if the output current ratings are observed.
For SO14 packages: above 70
C
the value of P
tot
derates linearly with 8 mW/K.
For (T)SSOP14 packages: above 60
C
the value of P
tot
derates linearly with 5.5 mW/K.
For DHVQFN14 packages: above 60
C
the value of P
tot
derates linearly with 4.5 mW/K.
8. Recommended operating conditions
Table 5.
Symbol
V
CC
V
I
V
O
T
amb
t/V
Recommended operating conditions
Parameter
supply voltage
functional
input voltage
output voltage
ambient temperature
input transition rise
and fall rate
output HIGH or LOW state
output 3-state
in free air
V
CC
= 1.65 V to 2.7 V
V
CC
= 2.7 V to 3.6 V
Conditions
Min
1.65
1.2
0
0
0
40
0
0
Typ
-
-
-
-
-
-
-
-
Max
3.6
-
5.5
V
CC
5.5
+125
20
10
Unit
V
V
V
V
V
C
ns/V
ns/V
9. Static characteristics
Table 6.
Static characteristics
At recommended operating conditions. Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
V
IH
HIGH-level
input voltage
Conditions
V
CC
= 1.2 V
V
CC
= 1.65 V to 1.95 V
V
CC
= 2.3 V to 2.7 V
V
CC
= 2.7 V to 3.6 V
V
IL
LOW-level
input voltage
V
CC
= 1.2 V
V
CC
= 1.65 V to 1.95 V
V
CC
= 2.3 V to 2.7 V
V
CC
= 2.7 V to 3.6 V
1.08
1.7
2.0
-
-
-
-
40 C
to +85
C
Min
Typ
[1]
-
-
-
-
-
-
-
-
-
-
-
0.12
0.7
0.8
Max
40 C
to +125
C
Min
1.08
1.7
2.0
-
-
-
-
-
-
0.12
0.7
0.8
0.65
V
CC
-
Max
V
V
V
V
V
V
V
Unit
0.65
V
CC
-
0.35
V
CC
-
0.35
V
CC
V
74LVC126A
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 8 — 8 April 2014
4 of 16
NXP Semiconductors
74LVC126A
Quad buffer/line driver with 5 V tolerant input/outputs; 3-state
Table 6.
Static characteristics
…continued
At recommended operating conditions. Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
V
OH
HIGH-level
output
voltage
Conditions
V
I
= V
IH
or V
IL
I
O
=
100 A;
V
CC
= 1.65 V to 3.6 V
I
O
=
4
mA; V
CC
= 1.65 V
I
O
=
8
mA; V
CC
= 2.3 V
I
O
=
12
mA; V
CC
= 2.7 V
I
O
=
18
mA; V
CC
= 3.0 V
I
O
=
24
mA; V
CC
= 3.0 V
V
OL
LOW-level
output
voltage
V
I
= V
IH
or V
IL
I
O
= 100
A;
V
CC
= 1.65 V to 3.6 V
I
O
= 4 mA; V
CC
= 1.65 V
I
O
= 8 mA; V
CC
= 2.3 V
I
O
= 12 mA; V
CC
= 2.7 V
I
O
= 24 mA; V
CC
= 3.0 V
I
I
I
OZ
-
-
-
-
-
-
-
-
-
-
0.1
0.1
0.2
0.45
0.6
0.4
0.55
5
5
-
-
-
-
-
-
-
0.3
0.65
0.8
0.6
0.8
20
20
V
V
V
V
V
A
A
V
CC
0.2
1.2
1.8
2.2
2.4
2.2
-
-
-
-
-
-
-
-
-
-
-
-
V
CC
0.3
1.05
1.65
2.05
2.25
2.0
-
-
-
-
-
-
V
V
V
V
V
V
40 C
to +85
C
Min
Typ
[1]
Max
40 C
to +125
C
Min
Max
Unit
input leakage V
CC
= 3.6 V; V
I
= 5.5 V or GND -
current
OFF-state
output
current
power-off
leakage
current
supply
current
additional
supply
current
input
capacitance
V
I
= V
IH
or V
IL
; V
CC
= 3.6 V;
V
O
= 5.5 V or GND;
V
CC
= 0 V; V
I
or V
O
= 5.5 V
-
I
OFF
-
0.1
10
-
20
A
I
CC
I
CC
V
CC
= 3.6 V; V
I
= V
CC
or GND;
I
O
= 0 A
per input pin;
V
CC
= 1.65 V to 3.6 V;
V
I
= V
CC
0.6 V; I
O
= 0 A
V
CC
= 0 V to 3.6 V;
V
I
= GND to V
CC
-
-
0.1
5
10
500
-
-
40
5000
A
A
C
I
-
4.0
-
-
-
pF
[1]
All typical values are measured at V
CC
= 3.3 V (unless stated otherwise) and T
amb
= 25
C.
74LVC126A
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 8 — 8 April 2014
5 of 16
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
