Data Sheet No. PD94148
IRU3034 & (PbF)
8-PIN PWM SWITCHER CONTROLLER IC
WITH CURRENT LIMITING
DESCRIPTION
The IRU3034 IC provides a low cost switching controller
with true short circuit protection all in a compact 8-pin
surface mount package, providing a low cost switching
solution for dual supply processor applications that re-
quire switching regulator for the 3.3V supply such as
the applications with AGP on-board. Typically in these
applications, a dual supply regulator converts 5V to 3.3V
for I/O supply and a jumper programmable supply of
1.25V to 3.5V for Core supply. The IC uses an internal
regulator generated from the 12V supply to power the
controller as well as the 12V supply to drive the power
MOSFET, allowing a low cost N-channel MOSFET to be
used. The IC also includes an error comparator for fast
transient response, a precise voltage reference for set-
ting the output voltage as well as a direct drive of the
MOSFET for the minimum part count.
FEATURES
8-Pin SOIC switching controller with
HICCUP current limiting reduces diode power
dissipation to less than 1% of normal operation
Soft-Start capacitor allows for smooth output
voltage ramp up
On-Board MOSFET Driver
Fastest transient response of any controller
method. (0 to 100% Duty Cycle in 100ns)
1% Internal Voltage Reference
Internal Under-Voltage Lockout protects MOSFET
during start-up
APPLICATIONS
Dual supply low voltage processor applications,
such as: P55C, CYRIX M2, POWER PC and
AMD K6
Simple 5V to 3.3V switcher for Pentium with AGP
or Pentium II applications
TYPICAL APPLICATION
C8
SS
CS+
CS-
C6
Drv
IRU3034
Gnd
12V
R1
V
12
V
FB
V
HYST
C3
R3
C5
L2
R8
R7
R6
C7
V
OUT
L1
5V
C1
C2
Q2
C4
R2
D1
R4
R5
Figure 1 - Typical application of IRU3034.
Notes:
P55C, Pentium II are trademarks of Intel Corp. K5 & K6 are trademarks of AMD corp. Cyrix 6X86L, M1, M2 are trademarks of Cyrix
Corp. Power PC is trademark of IBM Corp.
Rev. 2.1
3/14/2005
www.irf.com
1
IRU3034 & (PbF)
ABSOLUTE MAXIMUM RATINGS
V
12
Supply Voltages ..................................................
Fb Pin Voltages .........................................................
Storage Temperature Range .......................................
Operating Junction Temperature .................................
20V
-0.3V To 5V
-65 To 150°C
0 To 150°C
PACKAGE INFORMATION
8-PIN PLASTIC SOIC (S)
TOP VIEW
Drv
1
V
12
2
V
FB
3
V
HYST
4
8
SS
7
CS+
6
CS-
5
Gnd
υ
JA
=1608C/W
ELECTRICAL SPECIFICATIONS
Unless otherwise specified, the following specification applies over V
12
=12V and T
A
=0 to 708C. Low duty cycle
pulse testing is used which keeps junction and case temperatures equal to the ambient temperature.
PARAMETER
Fb Voltage Initial Accuracy
Fb Voltage Total Variation
Fb Voltage Line Regulation
Fb Input Bias Current
Minimum On Time
Minimum Off Time
V
HYST
Pin Output-HI
V
HYST
Pin Output-LO
Supply Current
Maximum Duty Cycle
Minimum Duty Cycle
Gate Drive Rise/Fall Time
CL Threshold Current
CS Comp Common Mode
Soft-Start Current
SYM
V
FB
TEST CONDITION
T
J
=258C
MIN
1.237
1.225
-1
800
800
11
1
10
100
0
70
20
0
10
4.5
TYP
1.250
1.250
0.2
MAX UNITS
1.262
V
V
1.275
%
+1
µ
A
ns
ns
V
V
mA
%
%
ns
µ
A
V
µ
A
I
FB
I
12(SW)
D
MAX
D
MIN
V
GATE
I
CL
V
FB
=1.25V
V
FB
is sq wave with 300ns on
time and 2µs off time
V
FB
is sq wave with 300ns off
time and 2µs on time
I
SOURCE
=500µA, V
FB
=1.5V
I
SINK
=500µA, V
FB
=1V
V
FB
=1V
V
FB
=1V
V
FB
=1.5V
Load=IRL3303
CS+, CS- from 1.3V to 3.7V
V
CS+
=V
CS-
2
www.irf.com
Rev. 2.1
3/14/2005
IRU3034 & (PbF)
PIN DESCRIPTIONS
PIN # PIN SYMBOL
Drv
1
2
3
4
5
6
V
12
V
FB
V
HYST
Gnd
CS-
PIN DESCRIPTION
The PWM output of the switching controller. This pin is a totem pole drive that is con-
nected to the gate of the power MOSFET. A resistor may be placed from this pin to the
gate in order to reduce switching noise.
This pin supplies the voltage to the PWM drive and hysteresis circuitry and it is connected
to the 12V supply. A 1µF, high frequency capacitor must be connected from this pin to
ground to provide the peak current for charging and discharging of the MOSFET.
A resistor divider from this pin to the output of the switching regulator and ground sets the
Core supply voltage.
A resistor and a 10pF capacitor is connected from this pin to the V
FB
pin to set the output
ripple voltage for the switching regulator.
This pin is connected to the IC substrate and must be connected to the lowest potential in
the system.
This pin is connected to the minus side of the external current sense resistor. An internal
current source together with an external resistor in series with this pin programs the
current limit threshold voltage. This voltage divided by the external current sense resistor
sets the current limit threshold.
This pin is connected to the plus side of the external current sense resistor. A resistor in
series with this pin and a capacitor connected between this pin and pin 6 provides a high
frequency filtering for the noise spikes of turn on and turn off switching.
This pin provides the soft-start for the regulator during power up. It also sets a long off time
when the converter goes into current limiting, providing low duty cycle for the catch diode
allowing it to survive during short circuit.
7
8
CS+
SS
BLOCK DIAGRAM
V
12
2
V
HYST
4
V
FB
3
5V Reg
R
Drv
1
UVLO
20uA
CS-
6
CS+
7
SS
8
PWM Control
1.25V
3R
V
REF
Gnd
5
S.S. / Hiccup
Control
Figure 2 - Simplified block diagram of the IRU3034.
Rev. 2.1
3/14/2005
www.irf.com
3
IRU3034 & (PbF)
TYPICAL APPLICATION
Pentium Core Supply Application (IRU3034 and IRU3033 Dual Layout)
Low Cost 4-Bit VID
R9
C8
SS/
V
12
V
12
Note:
R9 can be
eliminated if dual
layout with IRU3033
is not desired.
12V
CS-/ CS+/
V
FB2
Drv2
Gnd
U1
V
FB
V
HYST
L2
R3
C5
R8
C6
C3
Drv
R1
R7
R6
C7
V
OUT
L1
5V
C1
C2
Q2
C4
R2
D1
R5A
JP1 1
2
R5B
3
4
R5C
5
6
R5D
7
8
R4
R5E
Figure 3 - Typical application of IRU3034 in a flexible motherboard with the 4-bit VID output voltage selection. This
circuit is done using a dual layout with the IRU3033 part. The advantage of this circuit is that it uses a single jumper
that programs the output voltage in 16 steps with 0.1V steps from 2V to 3.5V, designed for Intel P55, P54, AMD K5
& K6 as well as Cyrix M1 and M2 applications.
JP1 JP1 JP1 JP1 Output
1-2 3-4 5-6 7-8
Voltage
0
3.5
0
0
0
3.4
0
0
1
0
3.3
0
0
0
1
1
3.2
1
0
0
3.1
1
0
0
0
3.0
1
0
1
0
0
2.9
1
1
0
2.8
1
1
1
0
2.7
0
0
1
0
0
1
2.6
1
0
0
2.5
1
0
1
1
2.4
0
1
1
0
0
2.3
1
1
1
2.2
1
1
0
0
2.1
1
1
1
0 = Jumper block is installed.
2.0
1
1
1
1
1 = Jumper block is not installed.
4
www.irf.com
Rev. 2.1
3/14/2005
IRU3034 & (PbF)
PENTIUM CORE SUPPLY APPLICATION PARTS LIST
(IRU3034 and IRU3033 Dual Layout) Low Cost 4-Bit VID
Ref Desig Description
Qty
U1
LDO/Switcher IC 1
Q2
MOSFET
1
D1
L2
L1
R1
R2
R3
R4A *
R4B *
R5A
R5B
R5C
R5D
R5E
R6
R7
R8
R9
C1
C2
C3
C4
C5
C7
C8
C6
HS1
HS2
Schottky Diode
Inductor
Inductor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Capacitor
Capacitor
Capacitor
Capacitor
Capacitor
Capacitor
Capacitor
Capacitor
Heat Sink
Heat Sink
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
4
1
1
1
1
Part #
IRU3034CS (8-Pin SOIC)
IRL3303 (TO-220)
IRL3103S (TO-263) (Note 1)
MBR1045CT (TO-220)
MBRB1545CT (TO-263) (Note1)
Core: T50-18, L=4µH
Turns: 10T, 18 AWG
L=2µH
22ς, 5%, SMT 1206 size
10ς, 5%, SMT 1206 size
324Kς, 1%, SMT 0805 size
806ς, 1%, SMT 0805 size
90.9Kς, 1%, SMT 0805 size
1.24Kς, 1%, SMT 0805 size
2.49Kς, 1%, SMT 0805 size
4.99Kς, 1%, SMT 0805 size
10Kς, 1%, SMT 0805 size
1.30ς, 1%, SMT 0805 size
5mς, 5%, 2W
4.99Kς, 1%, SMT 0805 size
4.7Kς, 5% for IRU3034, open for 3033
Open for IRU3034, 10ς for IRU3033
6MV1500GX, 1500µF, 6.3V, Elect
6MV1500GX, 1500µF, 6.3V, Elect
1µF, Ceramic, SMT 0805 size
470pF, Ceramic, SMT 0805 size
10pF, Ceramic, SMT 0805 size
6MV1500GX, 1500µF, 6.3V, Elect
0.047µF for 3034 , 0.1µF for IRU3033
4700pF for IRU3034, open for IRU3033
For MOSFET, 577002
For Schottky Diode, 577002
Manuf
IR
IR
Motorola
Micro Metal
(core)
Sanyo
Sanyo
Sanyo
Sanyo
Aavid
Aavid
*R4 is a parallel combination of R4A and R4B.
Note:
For the applications where it is desirable to eliminate the heat sink, the IRL3103S for Q2 and
MBR1545CT for D2 in TO-263 packages with minimum of 1" square copper pad can be used.
Rev. 2.1
3/14/2005
www.irf.com
5
FPGA/CPLD
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
