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SIT3522AC-1C1282SG725.000000T

产品描述XO, Clock,
产品类别无源元件    振荡器   
文件大小3MB,共48页
制造商SiTime
标准
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SIT3522AC-1C1282SG725.000000T概述

XO, Clock,

SIT3522AC-1C1282SG725.000000T规格参数

参数名称属性值
是否Rohs认证符合
Objectid145207249818
Reach Compliance Codeunknown
Country Of OriginMalaysia, Taiwan, Thailand
YTEOL6.7
其他特性ENABLE/DISABLE FUNCTION; DIFFERENTIAL OUTPUT; TR
最长下降时间0.29 ns
频率调整-机械NO
频率稳定性20%
JESD-609代码e4
安装特点SURFACE MOUNT
端子数量10
标称工作频率725 MHz
最高工作温度70 °C
最低工作温度-20 °C
振荡器类型LVPECL
输出负载50 OHM
物理尺寸5.0mm x 3.2mm x 0.9mm
最长上升时间0.29 ns
最大供电电压3.08 V
最小供电电压2.52 V
标称供电电压2.8 V
表面贴装YES
最大对称度55/45 %
端子面层Nickel/Palladium/Gold (Ni/Pd/Au)

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SiT3522
Description
PRELIMINARY
340 to 725 MHz Elite Platform™ I
2
C/SPI Programmable Oscillator
Features
The
SiT3522
is an ultra-low jitter, user programmable
oscillator which offers the system designer great flexibility
and functionality.
The device supports two in-system programming options
after powering up at a default, factory programmed startup
frequency:
Any-frequency mode where the clock output can be re-
programmed to any frequency between 340 MHz and
725 MHz in 1 Hz steps
Digitally controlled oscillator (DCO) mode where the
clock output can be steered or pulled by up to
±3200
ppm with 5 to 94 ppt (parts per trillion) resolution.
A user specifies the device’s default start-up frequency in
the ordering code. User programming of the device is
2
2
achieved via I C or SPI. Up to 16 I C addresses can be
specified by the user either as a factory programmable
option or via hardware pins, enabling the device to share
2
2
the I C with other I C devices.
The SiT3522 utilizes SiTime’s unique DualMEMS™
temperature sensing and TurboCompensation™ technology
to deliver exceptional dynamic performance
Programmable frequencies (factory or via I C/SPI)
from 340.000001 MHz to 725 MHz
2
Digital frequency pulling (DCO) via I C/SPI
Output frequency pulling with perfect pull linearity
13 programmable pull range options to
±3200
ppm
Frequency pull resolution as low as 5 ppt (0.005 ppb)
0.21 ps typical integrated phase jitter (12 kHz to 20 MHz)
Integrated LDO for on-chip power supply noise filtering
0.02 ps/mV PSNR
-40°C to 105°C operating temperature
LVPECL, LVDS, or HCSL outputs
Programmable LVPECL, LVDS Swing
LVDS Common Mode Voltage Control
RoHS and REACH compliant, Pb-free, Halogen-free
and Antimony-free
2
Applications
Resistant to airflow and thermal shock
Resistant to shock and vibration
Superior power supply noise rejection
Combined with wide frequency range and user
programmability, this device is ideal for telecom, networking
and industrial applications that require a variety of
frequencies and operate in noisy environment.
Ethernet: 1/10/40/100/400 Gbps
G.fast and xDSL
Optical Transport: SONET/SDH, OTN
Clock and data recovery
Processor over-clocking
Low jitter clock generation
Server, storage, datacenter
Test and measurement
Broadcasting
Block Diagram
Package Pinout
(10-Lead QFN, 5.0 x 3.2 mm)
O
IS
M
A/ K
SD C L
S
10
9
OE / NC
OE / NC
GND
1
2
3
4
5
8
7
6
VDD
OUT-
OUT+
A1 A0
/N /N
C/ C/
M SS
O
SI
Figure 1. SiT3522 Block Diagram
Figure 2. Pin Assignments (Top view)
(Refer to
Table 14
for Pin Descriptions)
Rev 0.91
April 25, 2020
www.sitime.com
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