Absolute Maximum Ratings are limits beyond which damage to the device may occur. For guaranteed performance limits and associated test
conditions, see the Electrical Characteristics tables.
Note 2:
See Circuit in Typical Applications. To ensure constant junction temperature, low duty cycle pulse testing is used.
Note 3:
Limits appearing in
boldface
type apply over the entire junction temperature range for operation. Limits appearing in normal type apply for
T
A
= T
J
= 25°C.
Note 4:
The junction-to-ambient thermal resistance are as follows: 195°C/W for the TO-92 (N) package, 160°C/W for the molded plastic SO-8 (S), 50°C/W
for the TO-220 package and 73°C/W for the TO-263 package. If the TO-220 package is used with a heat sink,
θ
JA
is the sum of the package thermal resistance
junction-to-case of 3°C/W and the thermal resistance added by the heat sink and the thermal interface. The thermal resistance of the TO-263 package can be
reduced by increasing the PCB copper area thermally connected to the package: using 0.5 square inches of copper area,
ϕ
JA
is 50°C/W; with 1 square inch of
copper area
ϕ
JA
is 37°C/W; and with 1.6 or more square inches of copper area
ϕ
JA
is 32°C/W.
www.advanced-monolithic.com
updated April 24, 2009
AMS2930
PIN CONNECTIONS
FIXED OUTPUT VOLTAGE
TO-92
Plastic Package (N)
OUTPUT
INPUT
8L SOIC
SO-Package (S)
OUTPUT 1
GROUND 2
GROUND 3
8 INPUT
TO-220 (T)
TO-263 (M)
6 GROUND
5 N/C
GND
N/C 4
Bottom View
Top View
GND
7 GROUND
OUTPUT
GND
INPUT
TAB IS
GND
OUTPUT
GND
INPUT
Front View
Top View
ADJUSTABLE OUTPUT VOLTAGE
8L SOIC
SO-Package (S)
OUTPUT 1
GROUND 2
GROUND 3
ADJ 4
8 INPUT
7 GROUND
6 GROUND
5 ON/OFF
Top View
TYPICAL APPLICATIONS
AMS2930-X (Fixed Output)
AMS2930C (Adjustable Output)
V
CC
V
IN
UNREGULATED
INPUT
C1*
0.1
µ
F
AMS2930
V
OUT
REGULATED
OUTPUT
C2**
100
µ
F
GND
R
3
51k
OFF
C1*
0.1µF
ON
ON/OFF
AMS2930
ADJUSTABLE
I
Q
OUT
R
1
28k
ADJ
GND
R
2
+
C2**
100µF
V
OUT
*Required if regulator is located far from power supply filter.
**C2 must be at least 100µF to maintain stability; it can be increased
without bound to maintain regulation during transients and it should be
located as close as possible to the regulator. This capacitor must be rated
over the same operating temperature range like the regulator. The ESR
of this capacitor is critical (see curve) and it should by less than 1Ω over
the expected operating temperature range.
V
OUT
= V
REF
×
( R
1
+R
2
)/R
1
Note: Using 27k for R1 will automatically compensate for errors in V
OUT
due to the input bias current of the Adjust Pin ( approx. 1µA)
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