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EG-2121CB148.3517M-PGSNL0

产品描述IC,CRYSTAL OSCILLATOR,1-CHANNEL,100MHZ-700MHZ,LLCC,6PIN,CERAMIC
产品类别无源元件    振荡器   
文件大小196KB,共1页
制造商Seiko Epson Corporation
标准
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EG-2121CB148.3517M-PGSNL0概述

IC,CRYSTAL OSCILLATOR,1-CHANNEL,100MHZ-700MHZ,LLCC,6PIN,CERAMIC

EG-2121CB148.3517M-PGSNL0规格参数

参数名称属性值
是否Rohs认证符合
Objectid113763683
包装说明SOLCC6,.12
Reach Compliance Codecompliant
JESD-609代码e4
安装特点SURFACE MOUNT
端子数量6
最大工作频率700 MHz
最小工作频率100 MHz
标称工作频率148.3517 MHz
最高工作温度70 °C
最低工作温度-20 °C
封装主体材料CERAMIC
封装等效代码SOLCC6,.12
电源2.5 V
认证状态Not Qualified
最大压摆率60 mA
标称供电电压2.5 V
表面贴装YES
端子面层Gold (Au)

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Crystal oscillator
Epson Toyocom
Product Number (please contact us)
CRYSTAL OSCILLATOR
LOW-JITTER SAW OSCILLATOR
EG-2121CB P: X1M000211xxxx00
EG-2121CB L: X1M000231xxxx00
EG-2102CB P: X1M000201xxxx00
EG-2102CB L: X1M000221xxxx00
EG - 2121
/
2102CB
Frequency
range
Supply
voltage
:
:
:
Output
:
Function
:
External
dimensions
:
100 MHz to 700 MHz
2.5 V

EG-2121CB
3.3 V

EG-2102CB
Differential LV-PECL or LVDS
Output enable (OE)
5.0 × 3.2 × 1.4 mm
Actual size
Low
jitter and low phase noise by SAW unit.
Specifications (characteristics)
Item
Output frequency range
Supply voltage
Storage temperature
Operating temperature *1
Frequency tolerance *1
Current consumption
Disable current
Symmetry
Output voltage
(Differential LV-PECL)
Symbol
Differential LV-PECL
EG-2121CB P
EG-2102CB P
2.5 V
0.125
V
LVDS
EG-2121CB L
EG-2102CB L
Conditions / Remarks
Please contact us for inquiries regarding available
frequencies.
Store as bare product.
fo
V
CC
T_stg
T_use
f_tol
I
CC
I_dis
SYM
V
OH
V
OL
V
OD
dV
OD
V
OS
dV
OS
L_ECL
L_LVDS
V
IH
V
IL
t
r
/ t
f
t_str
t
PJ
100 MHz to 700 MHz
3.3 V
0.33
V
2.5 V
0.125
V
3.3 V
0.33
V
-55
C
to +125
C
P:0
C
to +70
C
,R:-5
C
to +85
C
,S:-20
C
to +70
C
G:
50
10
-6
,H:
100 
10
-6
60 mA Max.
30 mA Max.
2 mA Max.
15 mA Max.
45 % to 55 %
1.55 V Typ.
2.35 V Typ.
V
CC
-1.025 V to V
CC
-0.88 V
0.80 V Typ.
1.60 V Typ.
V
CC
-1.81 V to V
CC
-1.62 V
350 mV Typ, 247 mV to 454 mV
50 mV Max.
1.25 V Typ, 1.125 V to 1.375 V
150 mV Max.
50
100
70 % V
CC
Min.
30 % V
CC
Max.
400 ps Max.
10 ms Max.
0.3 ps Max.
0.2 ps Max.
0.1 ps Max.
10
10
-6
/ year Max.
OE=V
CC
, L_ECL=50
or L_LVDS=100
OE=GND
At outputs crossing point
DC characteristics
V
OD1
, V
OD2
dV
OD
=
V
OD1
-V
OD2
DC characteristics
V
OS1
, V
OS2
dV
OS
=
V
OS1
-V
OS2
Terminated to V
CC
-2.0 V
Connected between OUT to
OUT
OE terminal
Between 20 % and 80 % of (V
OH
-V
OL
).
Between 20 % and 80 %of Differential Output peek
to peek voltage.
Time at minimum supply voltage to be 0 s
fo
350 MHz
Offset frequency:
350 MHz
fo
600 MHz
12 kHz to 20 MHz
fo
600 MHz
+25
C,
First year, V
CC
=2.5 V,3.3 V
Output voltage (LVDS)
Output load condition
(ECL) / (LVDS)
Input voltage
Rise time / Fall time
Start-up time
Phase Jitter
Frequency aging *2
f_aging
*1 As per below table.
*2 Except : ***A
Output
P: Differential LV-PECL
A *3
N *4
Aging:
A (include 10years aging at 25C) or N (exclude aging)
-6
PHPA
PHPN
HP:
100 
10 , ( 0 to +70
C)
-6
HR:
100 
10 , ( -5 to +85
C)
PHRA
PHRN
-6
PHSA
PHSN
HS:
100 
10 , ( -20 to +70
C)
Frequency tolerance and
-6
operating temperature
PGPA
PGPN
GP:
50 
10 , ( 0 to +70
C)
-6
GR:
50 
10 , ( -5 to +85
C)
-
PGRN
-6
-
PGSN
GS:
50 
10 , ( -20 to +70
C)
*3 This includes initial frequency tolerance, temperature variation, supply voltage variation, reflow drift, and aging(+25
C,10
years).
*4 This includes initial frequency tolerance, temperature variation, supply voltage variation, and reflow drift (except aging).
L: LVDS
A *3
LHPA
LHRA
LHSA
LGPA
-
-
N *4
LHPN
LHRN
LHSN
LGPN
LGRN
LGSN
External dimensions
0.64
#6
#5
#4
#4
#5
#6
1.3
(Unit:mm)
Footprint (Recommended)
0.84
(Unit:mm)
3.2
0.2
0.6
E
212.50P
1P 1X1A
#1
#2
5.0
0.2
#3
#3
#2
1.27
#1
1.27
2.54
2.54
OE pin = HIGH : Specified frequency output.
OE pin = LOW : Output is high impedance
#2 and #3 are connected to the cover.
Pin map
Pin
Connection
1
OE *
2
GND
3
GND
4
OUT
5
OUT
6
V
CC
*) Standby function built-in.
(Only Differential LV-PECL output model)
1.4
0.15
To maintain stable operation, provide a 0.01 µF to
0.1 µF by-pass capacitor at a location as near as
possible to the power source terminal of the crystal
product (between V
CC
- GND).
http://www.epsontoyocom.co.jp
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