SM572288578EB3RLP
July 3, 2002
Orderable Part Numbers
Module Part Number
SM572288578EB3RLP
Description
128Mx72 (1GB), SDRAM, 168-pin DIMM, Registered, ECC,
128Mx8 (Stacked - two 128Mx4) Based, PC133, CL=4 (Device=3), 26.67mm.
Revision History
• July 3, 2002
Modified mechanical drawing on page 11.
• September 25, 2001
Modified Input Capacitance on page 5.
• July 12, 2001
Modified AC Characteristics (t
RCD
) on page 7.
• May 14, 2001
Modified standard from JEDEC to PC133 on page 2.
• March 21, 2001
Datasheet released.
C
orporate Headquarters:
P. O. Box 1757, Fremont, CA 94538, USA • Tel:(510) 623-1231 • Fax:(510) 623-1434 • E-mail: info@smartm.com
Europe:
5 Kelvin Park South, Kelvin South, East Kilbride, G75 ORH, United Kingdom • Tel: +44-870-870-8747 • Fax: +44-870-870-8757
Asia/Pacific:
Plot 18, Lrg Jelawat 4, Kawasan Perindustrian Seberang Jaya 13700, Prai, Penang, Malaysia • Tel: +604-3992909 • Fax: +604-3992903
1
SM572288578EB3RLP
July 3, 2002
1GByte (128Mx72) SDRAM Module - 128Mx8 based (Stacked - two 128Mx4)
168-pin DIMM, Registered, ECC
Features
•
•
•
•
•
•
•
Standard
Configuration
Cycle Time
CAS# Latency
Burst Length
Burst Type
No. of Internal
Banks per SDRAM
:
:
:
:
:
:
:
PC133
ECC
7.5ns
Device = 3, Module = 4
1, 2, 4, 8 or Page
Linear/Interleave
4
•
•
•
•
•
•
•
Operating Voltage :
3.3V
Refresh
:
8K/64ms
Device Physicals
:
Stacked
Lead Finish
:
Gold
Length x Height
:
133.35mm x 26.67mm
No. of sides
:
Double-sided
Mating Connector (Examples)
Vertical
:
AMP-390074-6
Functional Diagram
REGE
DQMB0~DQMB7
CS0#, CS2#
RDQMB0~RDQMB7
CKE0
RAS#
CAS#
WE#
R
E
G
I
S
T
E
R
S
CS0#, CS2#
CS0#
128Mx16
Stacked
Block
128Mx16
Stacked
Block
CS2#
128Mx24
Stacked
Block
128Mx16
Stacked
Block
PCK0
PLL
Clock
Buffer
Feedback
DQ0~DQ15
DQ32~DQ47
CB0~CB7
DQ16~DQ31
DQ48~DQ63
DQ0~DQ63, CB0~CB7
PCK10
PCK1~PCK9
(To all SDRAMs)
CK0
SA0~SA2
SCL
Notes:
1.
A0~A12, BA0 and BA1 to all SDRAMs through registers.
2.
Registers Block comprises of two registers.
3.
Data is terminated using 10
Ω
series resistors.
4.
REGE, when asserted active high the buffer-register operates in Register
mode, when deasserted inactive low the buffer-register operates in “real-time”
buffer mode. REGE has pull-up of 10K
Ω
.
5.
CK signals are terminated with series resistors and/or padding capacitors
depending on load per clock.
6.
For RDQMB control see note on page 3.
7.
Each 128Mx16 block comprises of two 128Mx8 stacks and each
128Mx24 block comprises of three 128Mx8 stacks.
A0~A2
SCL
SDA
WC
SERIAL PD
EEPROM
SDA
47K
V
CC
V
SS
Decoupling capacitors
to all devices.
( All specifications of this device are subject to change without notice.)
C
orporate Headquarters:
P. O. Box 1757, Fremont, CA 94538, USA • Tel:(510) 623-1231 • Fax:(510) 623-1434 • E-mail: info@smartm.com
Europe:
5 Kelvin Park South, Kelvin South, East Kilbride, G75 ORH, United Kingdom • Tel: +44-870-870-8747 • Fax: +44-870-870-8757
Asia/Pacific:
Plot 18, Lrg Jelawat 4, Kawasan Perindustrian Seberang Jaya 13700, Prai, Penang, Malaysia • Tel: +604-3992909 • Fax: +604-3992903
2
SM572288578EB3RLP
July 3, 2002
Pin Name
A0~A12
A0~A9, A11
BA0, BA1
DQ0~DQ63, CB0~CB7
CK0
RAS#
CAS#
CKE0
DQMB0~DQMB7
Row Addresses
Column Addresses
Bank Select Address
Data Inputs/Outputs
Clock Inputs
Row Address Strobes
Column Address Strobes
Clock Enable
DQ Mask Enables
S0#~S3#
WE#
REGE
SA0~SA2
SDA
SCL
V
CC
V
SS
NC
Chip Selects
Write Enable
Register Enable
Decode Inputs
Serial Data Input/Output
Serial Clock
Power Supply
Ground
No Connection
Note:
RDQMs v/s Data I/Os
RDQMB0 controls DQ0~DQ7
RDQMB1 controls DQ8~DQ15
CB0~CB7
RDQMB2 controls DQ16~DQ23
RDQMB3 controls DQ24~DQ31
RDQMB4 controls DQ32~DQ39
RDQMB5 controls DQ40~DQ47
RDQMB6 controls DQ48~DQ55
RDQMB7 controls DQ56~DQ63
Pin
No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
Pin
Designation
V
SS
DQ0
DQ1
DQ2
DQ3
V
CC
DQ4
DQ5
DQ6
DQ7
DQ8
V
SS
DQ9
DQ10
DQ11
DQ12
DQ13
V
CC
DQ14
DQ15
CB0
CB1
V
SS
NC
NC
V
CC
WE#
DQMB0
DQMB1
S0#
NC
V
SS
A0
A2
A4
A6
A8
A10/AP (Note*)
BA1
V
CC
V
CC
CK0
Pin
No.
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
Pin
Designation
V
SS
NC
S2#
DQMB2
DQMB3
NC
V
CC
NC
NC
CB2
CB3
V
SS
DQ16
DQ17
DQ18
DQ19
V
CC
DQ20
NC
NC
CKE1
V
SS
DQ21
DQ22
DQ23
V
SS
DQ24
DQ25
DQ26
DQ27
V
CC
DQ28
DQ29
DQ30
DQ31
V
SS
CK2
NC
NC
SDA
SCL
V
CC
Pin
No.
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
Pin
Designation
V
SS
DQ32
DQ33
DQ34
DQ35
V
CC
DQ36
DQ37
DQ38
DQ39
DQ40
V
SS
DQ41
DQ42
DQ43
DQ44
DQ45
V
CC
DQ46
DQ47
CB4
CB5
V
SS
NC
NC
V
CC
CAS#
DQMB4
DQMB5
S1#
RAS#
V
SS
A1
A3
A5
A7
A9
BA0
A11
V
CC
CK1
A12
Pin
No.
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
Pin
Designation
V
SS
CKE0
S3#
DQMB6
DQMB7
NC
V
CC
NC
NC
CB6
CB7
V
SS
DQ48
DQ49
DQ50
DQ51
V
CC
DQ52
NC
NC
REGE
V
SS
DQ53
DQ54
DQ55
V
SS
DQ56
DQ57
DQ58
DQ59
V
CC
DQ60
DQ61
DQ62
DQ63
V
SS
CK3
NC
SA0
SA1
SA2
V
CC
CK1~CK3
: Terminated
Note* :
A10/AP initiates Auto-precharge.
C
orporate Headquarters:
P. O. Box 1757, Fremont, CA 94538, USA • Tel:(510) 623-1231 • Fax:(510) 623-1434 • E-mail: info@smartm.com
Europe:
5 Kelvin Park South, Kelvin South, East Kilbride, G75 ORH, United Kingdom • Tel: +44-870-870-8747 • Fax: +44-870-870-8757
Asia/Pacific:
Plot 18, Lrg Jelawat 4, Kawasan Perindustrian Seberang Jaya 13700, Prai, Penang, Malaysia • Tel: +604-3992909 • Fax: +604-3992903
3
SM572288578EB3RLP
July 3, 2002
DC Characteristics
Absolute Maximum Ratings
Parameter
Voltage on any pin relative to V
SS
Voltage on supply pins relative to V
SS
Power Dissipation
Operating Temperature
Storage Temperature
Symbol
V
IN,
V
OUT
V
CCQ
P
T
T
opr
T
stg
Ratings
- 1.0 to 4.6
- 1.0 to 4.6
40
0 to +70
°
C
- 55 to +150
Unit
V
V
W
°
C
°
C
Recommended DC Operating Conditions
(T
A
= 0 to +70
°
C)
Parameter
Supply Voltage
Ground
Input High Voltage
Input Low Voltage
Symbol
V
CC
V
SS
V
IH
V
IL
Min
3.0
0
2.0
-0.3
Typ
3.3
0
-
-
Max
3.6
0
V
CC
+0.3
0.8
Unit
V
V
V
V
C
orporate Headquarters:
P. O. Box 1757, Fremont, CA 94538, USA • Tel:(510) 623-1231 • Fax:(510) 623-1434 • E-mail: info@smartm.com
Europe:
5 Kelvin Park South, Kelvin South, East Kilbride, G75 ORH, United Kingdom • Tel: +44-870-870-8747 • Fax: +44-870-870-8757
Asia/Pacific:
Plot 18, Lrg Jelawat 4, Kawasan Perindustrian Seberang Jaya 13700, Prai, Penang, Malaysia • Tel: +604-3992909 • Fax: +604-3992903
4
SM572288578EB3RLP
July 3, 2002
DC Characteristics (cont’d)
Capacitance
(V
CC
= 3.3V±0.3V, T
A
= +25°C)
Parameter
Input Capacitance (All signals except Data, CKs)
Input Capacitance (CK0~CK3)
Input/Output Capacitance (DQ0~DQ63, CB0~CB7)
Notes : Capacitance is sampled per Mil-Std-883.
Symbol
C
I1
C
I2
C
I/O
Max
30
19
38
Unit
pF
pF
pF
(V
CC
= 3.3V±0.3V, V
SS
= 0V, T
A
= 0 to +70 °C)
Parameter
Input Leakage Current*
Output Leakage Current
Output High Voltage
Output Low Voltage
Symbol
I
LI
I
LO
V
OH
V
OL
Test Conditions
0V
≤
V
in
≤
V
CC
+0.3V
0V
≤
V
out
≤
V
CC
D
out
= Disable
High I
out
= -2mA
Low I
out
= 2mA
2.4
-
-
0.4
V
V
Min
-10
-10
Max
10
10
Unit
µA
µA
*Note : Except for REGE (0.33mA) and WP (0.07mA) pins.
C
orporate Headquarters:
P. O. Box 1757, Fremont, CA 94538, USA • Tel:(510) 623-1231 • Fax:(510) 623-1434 • E-mail: info@smartm.com
Europe:
5 Kelvin Park South, Kelvin South, East Kilbride, G75 ORH, United Kingdom • Tel: +44-870-870-8747 • Fax: +44-870-870-8757
Asia/Pacific:
Plot 18, Lrg Jelawat 4, Kawasan Perindustrian Seberang Jaya 13700, Prai, Penang, Malaysia • Tel: +604-3992909 • Fax: +604-3992903
5
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