LTC3525D-3.3
400mA Micropower
Synchronous Step-Up DC/DC
Converter with Pass Through Mode
FEATURES
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DESCRIPTION
The LTC
®
3525D-3.3 is a high efficiency synchronous step-
up DC/DC converter that can start up with an input as low
as 0.85V. It offers a compact, high efficiency alternative to
charge pumps in single cell or dual cell alkaline or Li-Ion
applications. Only three small external components are
required. The LTC3525D features a fixed output voltage
of 3.3V. In shutdown, V
OUT
is connected to V
IN
through
the inductor.
The device includes a 0.5Ω N-channel MOSFET switch
and a 0.8Ω P-channel synchronous rectifier. Peak switch
current ranges from 150mA to 400mA, depending on
load, providing enhanced efficiency. Quiescent current
is an ultralow 7µA, maximizing battery life in portable
applications.
Other features include anti-ringing control and thermal
shutdown. The LTC3525D is available in a tiny 6-pin SC70
package.
L,
LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and
ThinSOT is a trademark of Linear Technology Corporation. All other trademarks are the property
of their respective owners. Patents pending.
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V
OUT
Connected to V
IN
in Shutdown
Up to 95% Efficiency
0.85V Minimum Input Start-Up Voltage
Fixed Output Voltage of 3.3V
Delivers 60mA at 3.3V from a 1V Input,
or 140mA at 3.3V from a 1.8V Input
Burst Mode
®
Operation: I
Q
= 7µA
V
IN
Range: 0.5V to 4.5V
Only Three External Components
V
IN
> V
OUT
Operation
Anti-Ringing Control
Short-Circuit and Overtemperature Protection
Very Low Profile of 1mm
Tiny 6-Pin SC70 Package
APPLICATIONS
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MP3 Players
Portable Instruments
Glucose Meters
Digital Cameras
TYPICAL APPLICATION
LTC3525D-3.3 Efficiency and
Power Loss vs Load Current
100
L1*
10µH
90
80
EFFICIENCY (%)
V
IN
1.8V TO 3.2V
PASS THROUGH ON
1µF
LTC3525D-3.3
V
IN
SHDN
GND
SW
V
OUT
GND
V
OUT
3.3V
140mA
10µF
70
60
50
40
30
*MURATA LQH32CN100K53
3525 TA01
100
10
EFFICIENCY
1
POWER LOSS (mW)
POWER LOSS
0.1
V
IN
= 3V
V
IN
= 2.4V
V
IN
= 1.2V
0.1
1
10
LOAD (mA)
100
20
0.01
0.01
1000
LT3525 • TA02
3525d33fa
1
LTC3525D-3.3
ABSOLUTE MAXIMUM RATINGS
(Note 1)
PIN CONFIGURATION
TOP VIEW
SHDN
1
GND
2
V
IN
3
6
SW
5
GND
4 V
OUT
V
IN
, V
OUT
Voltage ........................................ –0.3V to 6V
SW Voltage ................................................. –0.3V to 6V
SW Voltage < 100ns.................................... –0.3V to 7V
SHDN
Voltage ............................................. –0.3V to 6V
Operating Temperature Range
(Notes 2, 5) ..............................................–40°C to 85°C
Storage Temperature Range .................. –65°C to 125°C
Lead Temperature (Soldering, 10 sec)................... 300°C
SC6 PACKAGE
6-LEAD PLASTIC SC70
T
JMAX
= 125°C
θ
JA
= 256°C/W IN FREE AIR,
θ
JA
= 150°C/W ON BOARD OVER GROUND PLANE
ORDER INFORMATION
LEAD FREE FINISH
LTC3525DESC6-3.3#PBF
TAPE AND REEL
LTC3525DESC6-3.3#TRPBF
PART MARKING
LCQZ
PACKAGE DESCRIPTION
6-Lead Plastic SC70
TEMPERATURE RANGE
–40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to:
http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to:
http://www.linear.com/tapeandreel/
ELECTRICAL CHARACTERISTICS
PARAMETER
Input Start-Up Voltage
Output Voltage
Quiescent Current, V
OUT
Quiescent Current, V
IN
Quiescent Current, V
IN
– Shutdown
NMOS Switch On-Resistance
PMOS Switch On-Resistance
Peak Current Limit
SHDN
Threshold Voltage
SHDN
Input Current
(Note 6)
The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T
A
= 25°C.
V
IN
= 1.2V, V
SHDN
= 1.2V, V
OUT
= 3.3V unless otherwise noted.
CONDITIONS
l
MIN
3.20
TYP
0.85
3.30
7
0.5
3
0.5
0.8
MAX
1
3.40
15
3
10
UNITS
V
V
µA
µA
µA
Ω
Ω
A
SHDN
= V
IN
(Note 4)
SHDN
= V
IN
(Note 4)
SHDN
= 0V, V
OUT
= V
IN
= 3.3V
Including Switch Leakage
(Note 3)
(Note 3)
0.4
0.4
V
SHDN
= V
IN
or V
OUT
0.45
0.6
0.01
1
1
V
µA
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2:
The LTC3525DE is guaranteed to meet performance specifications
from 0°C to 85°C. Specifications over the –40°C to 85°C operating
temperature range are assured by design, characterization and correlation
with statistical process controls.
Note 3:
Specification is guaranteed by design and not 100% tested in
production.
Note 4:
Current Measurements are performed when the LTC3525D is not
switching.
Note 5:
This IC includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature will exceed 125°C when overtemperature protection is active.
Continuous operation above the specified maximum operating junction
temperature may impair device reliability.
Note 6:
Consult LTC Marketing for other output voltage options.
3525d33fa
2
LTC3525D-3.3
TYPICAL PERFORMANCE CHARACTERISTICS
Maximum Output Current vs V
IN
(for V
OUT
to Drop 2.5%)
300
250
200
LOAD (mA)
I
OUT
(mA)
150
100
50
0
0.5
50
0
250
200
T
A
= 25°C unless otherwise noted.
Maximum Startup Load vs V
IN
(Resistive Load)
50
45
40
35
I
IN
(µA)
150
100
30
25
20
15
10
5
No-Load Input Current vs V
IN
1.0
1.5
2.0
2.5 3.0
V
IN
(V)
3.5
4.0
4.5
0.5
1.0
1.5
2.0
V
IN
(V)
2.5
3.0
3525d33 G02
0
1.0
1.5
2.0
2.5 3.0
V
IN
(V)
3.5
4.0
4.5
3525d33 G01
3525d33 G03
Efficiency and Power Loss
vs Load
100
90
EFFICIENCY
1
CHANGE IN V
OUT
(%)
80
EFFICIENCY (%)
70
60
50
40
30
20
0.01
0.1
1
10
LOAD (mA)
V
IN
= 3V
V
IN
= 2.4V
V
IN
= 1.2V
100
0.1
10
POWER LOSS (mW)
100
2.5
2.0
1.5
Load Regulation
V
IN
= 1.2V
2.5
2.0
1.5
CHANGE IN V
OUT
(%)
1.0
0.5
0
–0.5
–1.0
–1.5
–2.0
0
10
20
30 40 50
LOAD (mA)
60
70
80
–2.5
Load Regulation
V
IN
= 2.4V
1.0
0.5
0
–0.5
–1.0
–1.5
–2.0
–2.5
C
OUT
= 10µF
C
OUT
= 22µF
C
OUT
= 22µF
C
OUT
= 10µF
POWER LOSS
0.01
1000
0
20
40
60
80 100 120 140 160 180
LOAD (mA)
3525d33 G07
3525d33 G04
3525d33 G06
Light Load Burst Frequency
vs Load
40
35
BURST FREQUENCY (kHz)
CHANGE IN V
OUT
(%)
30
25
20
15
10
5
0
0.1
1
LOAD (mA)
C
OUT
= 10µF
0.4
0.3
V
OUT
Variation vs Temperature
(Normalized to 25°C)
120
100
SWITCHING DELAY (µs)
80
60
40
20
0
Start-Up Delay Coming Out of
Shutdown
0.2
0.1
0
–0.1
–0.2
–0.3
C
OUT
= 22µF
10
3525d33 G12
–0.4
–40–30–20–10 0 10 20 30 40 50 60 70 80
TEMPERATURE (°C)
3525d33 G13
1.0
1.5
2.0
2.5 3.0
V
IN
(V)
3.5
4.0
4.5
3525d33 G14
3525d33fa
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LTC3525D-3.3
TYPICAL PERFORMANCE CHARACTERISTICS
Output Voltage Ripple
I
OUT
5mA
I
OUT
40mA
I
OUT
80mA
V
IN
= 1.2V
C
OUT
= 10µF
50µs/DIV
3525d33 G16
T
A
= 25°C unless otherwise noted.
Output Voltage Ripple
I
OUT
5mA
50mV/DIV
I
OUT
40mA
I
OUT
80mA
V
IN
= 1.2V
C
OUT
= 22µF
50µs/DIV
3525d33 G17
50mV/DIV
Output Voltage Ripple
I
OUT
5mA
I
OUT
100mA
I
OUT
190mA
50mV/DIV
50mA Load Step Response
OUTPUT
RIPPLE
50mV/DIV
LOAD
CURRENT
20mA/DIV
V
IN
= 2.4V
C
OUT
= 22µF
50µs/DIV
3525d33 G18
V
IN
= 1.2V
C
OUT
= 22µF
500µs/DIV
3525d33 G21
100mA Load Step Response
OUTPUT
RIPPLE
50mV/DIV
LOAD
CURRENT
50mA/DIV
V
IN
= 2.4V
C
OUT
= 22µF
500µs/DIV
3525d33 G22
3525d33fa
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LTC3525D-3.3
PIN FUNCTIONS
SHDN
(Pin 1):
Logic-Controlled Shutdown Input. Connect
to a voltage >1V to enable the LTC3525D. Connect to a
voltage <0.4V to disable the LTC3525D and connect V
IN
to V
OUT
through the inductor.
GND (Pins 2, 5):
Ground.
V
IN
(Pin 3):
Input Voltage. The LTC3525D is powered from
V
IN
until V
OUT
exceeds V
IN
. Once V
OUT
is greater than
(V
IN
+ 0.2V typical), it is powered from V
OUT
. Place a
ceramic bypass capacitor from V
IN
to GND. A minimum
value of 1µF is recommended.
V
OUT
(Pin 4):
Output Voltage Sense and the Output of the
Synchronous Rectifier. Connect the output filter capacitor
from V
OUT
to GND, close to the IC. A minimum value of
10µF ceramic is recommended. Use 22µF for reduced
output ripple. The pass-through mode feature connects
V
OUT
to V
IN
through the inductor when
SHDN
is <0.4V.
SW (Pin 6):
Switch Pin. Connect an inductor from this
pin to V
IN
. An internal antiringing resistor is connected
across SW and V
IN
after the inductor current has dropped
to zero to minimize EMI.
BLOCK DIAGRAM
SW
6
V
OUT
V
SEL
V
BEST
VB
WELL
SWITCH
4 V
OUT
SHDN
1
SHUTDOWN
SHUTDOWN GATE DRIVERS
AND
ANTI-CROSS
CONDUCTION
OFFSET
V
REF
UVLO
V
REF
UVLO
I
PK
V
IN
3
+
–
ADJUST
I
PK
COMPARATOR
START-UP
LOGIC
I
VAL
SHUTDOWN
THERMAL
SHUTDOWN
TSD
WAKE
I
VALLEY
COMPARATOR
INTEGRATOR
ADJUST
5
GND
2
GND
SLEEP
COMPARATOR
+
–
+
–
+
–
OFFSET
+
–
ADJUST
FB
V
REF
3525d33 BD
3525d33fa
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嵌入式系统
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