SiP41103
Vishay Siliconix
Synchronous Rectification N-Channel MOSFET Driver
for DC/DC Conversion
DESCRIPTION
SiP41103 is a high-speed synchronous rectification
MOSFET driver with adaptive shoot-through protec-
tion for use in high frequency, high-current, mul-
tiphase DC-DC synchronous rectifier buck converter.
It is designed to operate at the switching frequencies
up to 1 MHz. The high-side driver is bootstrapped to
allow driving N-Channel MOSFET. Adaptive shoot-
through protection prevents simultaneous conduction
of external MOSFETs. Adding a capacitor to the delay
pin can further increase the high-side driver turn-on
delay by 1.2 ns/pF for further shoot-through protec-
tion.
The SiP41103 is available in both standard and lead
(Pb)-free 10-Pin MLP33 packages and is specified to
operate over the industrial temperature range of
- 40 °C to 85 °C.
FEATURES
• 5 V Gate Drive
• Undervoltage Lockout
• Internal Bootstrap Diode
• Adaptive Shoot-Through Protection
• Synchronous MOSFET Disable
• Adjustable Highside Propagation Delay
• Switching Frequency Up to 1 MHz
• Drive MOSFETs In 4.5 to 50 V Systems
Pb-free
Available
RoHS*
COMPLIANT
APPLICATIONS
• Multi-Phase DC/DC Conversion
• High Current Synchronous Buck Converters
• High Frequency Synchronous Buck Converters
• Asynchronous-to-Synchronous Adaptations
• Mobile Computer DC/DC Converters
• Desktop Computer DC/DC Converters
TYPICAL APPLICATION CIRCUIT
+ 5 to 50 V
+5V
1 µF
V
DD
DELAY
BOOT
0.1 µF
10 pF
OUT
H
SiP41103
PWM
LX
Controller
EN
SYNC
V
OUT
OUT
L
GND
GND
GND
*Pb containing terminations are not RoHS compliant, exemptions may apply
Document Number: 72718
S-61692–Rev. E,
04-Sep-06
www.vishay.com
1
SiP41103
Vishay Siliconix
ABSOLUTE MAXIMUM RATINGS
(All voltages referenced to GND = 0 V)
Parameter
V
DD
, PWM, EN
SYNC
, DELAY
LX, BOOT
BOOT to LX
Storage Temperature
Operating Junction Temperature
Power Dissipation
a,b
Thermal Impedance(Θ
JA
)
a,b
MLP-33
Limit
7
55
7
- 40 to 150
125
960
105
°C
mW
°C/W
V
Unit
Notes:
a. Device mounted with all leads soldered or welded to PC board
b. Derate 9.6 mW/°C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only,
and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is
not implied. Exposure to absolute maximum rating/conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING RANGE
(All voltages referenced to GND = 0 V)
Parameter
V
DD
V
BOOT
C
BOOT
Operating Temperature Range
Limit
4.5 to 5.5
4.5 to 50
100 nF to 1
µF
- 40 to 85
Unit
V
°C
SPECIFICATIONS
a
Test Conditions Unless Specified
V
DD
= 5 V, V
BOOT
- V
LX
= 5 V, C
LOAD
= 3 nF
T
A
= - 40 to 85 °C
Limits
Min
a
4.5
f
PWM
= 1 MHz, C
LOAD
= 0
PWM = 0 V
PWM = 5 V
LX Falling
4.0
± 0.3
30
1
V
DD
0.5
±1
V
DD
1.0
±1
Rising or Falling
I
F
= 10 mA, T
A
= 25 °C
2.5
0.7
3.35
0.76
3.75
0.82
2.3
Typ
b
Max
a
5.5
3.0
1
60
Unit
V
mA
µA
Parameter
Power Supplies
Supply Voltage
Quiescent Current
Shutdown Current
Reference Voltage
Break-Before-Make
PWM Input
Input High
Input Low
Bias Current
EN
SYNC
Inputs
Input High
Input Low
Bias Current
High-Side Undervoltage Lockout
Threshold
Bootstrap Diode
Forward Voltage
Symbol
V
DD
I
DDQ
I
SD1
I
SD2
V
BBM
V
IH
V
IL
I
B
V
IH
V
IL
I
B
V
UVHS
V
F
V
V
µA
2.0
V
µA
V
V
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2
Document Number: 72718
S-61692–Rev. E,
04-Sep-06
SiP41103
Vishay Siliconix
SPECIFICATIONS
a
Test Conditions Unless Specified
V
DD
= 5 V, V
BOOT
- V
LX
= 5 V, C
LOAD
= 3 nF
T
A
= - 40 to 85 °C
Limits
Min
a
Typ
b
0.9
1.1
0.8
1.5
2.5
2.2
3.4
1.4
10 % - 90 %
90 % - 10 %
See Timing Waveforms
See Timing Waveforms
10 % - 90 %
90 % - 10 %
See Timing Waveforms
See Timing Waveforms
32
36
20
30
45
20
30
30
420
ns
55
30
ns
3.8
3.3
5.1
2.1
40
45
Ω
A
Max
a
Unit
Parameter
MOSFET Drivers
High-Side Drive Current
c
Low-Side Drive Current
c
High-Side Driver Impedance
Low-Side Driver Impedance
High-Side Rise Time
High-Side Fall Time
High-Side Propagation Delay
c
Low-Side Rise Time
Low-Side Fall Time
Low-Side Propagation Delay
c
LX Timer
LX Falling Timeout
c
V
DD
Undervoltage Lockout
Threshold Rising
Threshold Falling
Hysteresis
Power on Reset Time
Thermal Shutdown
Temperature
Hysteresis
c
Symbol
I
PKH(source)
I
PKH(sink)
I
PKL(source)
I
PKL(sink)
R
DH(source)
R
DH(sink)
R
DL(source)
R
DL(sink)
t
rH
t
fH
t
d(off)H
t
d(on)H
t
rL
t
fL
t
d(off)L
t
d(on)L
t
LX
V
UVLOR
V
UVLOF
4.3
3.7
4.1
0.4
2.5
4.5
V
ms
T
SD
T
H
Temperature Rising
Temperature Falling
165
25
°C
Notes:
a. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum (- 40° to 85 °C).
b. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing and are measured at V
CC
= 5 V unless otherwise
noted.
c. Guaranteed by design.
Document Number: 72718
S-61692–Rev. E,
04-Sep-06
www.vishay.com
3
SiP41103
Vishay Siliconix
TIMING WAVEFORMS
PWM
50 %
50 %
OUT
H
t
fH
90 %
10 %
90 %
10 %
90 %
t
rH
90 %
10 %
t
d(on)H
OUT
L
t
d(off)H
10 %
t
rL
t
d(off)L
t
fL
LX
1V
t
d(on)L
PIN CONFIGURATION AND TRUTH TABLE
TRUTH TABLE
a
MLP33
OUT
H
BOOT
PWM
DELAY
GND
10
9
8
7
6
LX
EN
SYNC
NC
V
DD
OUT
L
PWM
L
L
H
EN
SYNC
L
H
X
OUT
H
L
L
H
OUT
L
L
H
L
2
3
4
5
Note:
a. After the device is enabled.
Top View
ORDERING INFORMATION
Standard Part Number
SiP41103DM-T1
Lead (Pb)-Free Part Number
SiP41103DM-T1-E3
Temperature Range
- 40 to 85 °C
Marking
41A3
Eval Kit
SiP41103DB
Temperature Range
- 40 to 85 °C
PIN DESCRIPTION
Pin Number
1
2
3
4
5
6
7
8
9
10
Name
OUT
H
BOOT
PWM
DELAY
GND
OUT
L
V
DD
NC
EN
SYNC
LX
Function
High-side MOSFET gate drive
Bootstrap supply for high-side driver. A capacitor connects between BOOT and LX
Input signal for the MOSFET drivers
Connection for the highside dealy adjustment capacitors
Ground
Synchronous or low-side MOSFET gate drive
+ 5 V supply
No Connect
Enables OUT
L
, the driver for the synchronous MOSFET
Connection for source of high-side MOSFET, drain of the low-side MOSFET and the inductor
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4
Document Number: 72718
S-61692–Rev. E,
04-Sep-06
SiP41103
Vishay Siliconix
FUNCTIONAL BLOCK DIAGRAM
V
DD
BOOT
UVLO
OTP
OUT
H
LX
DELAY
DELAY
PWM
EN
SYNC
−
+
V
BBM
V
DD
GND
OUT
L
Figure 1.
DETAILED OPERATION
PWM
The PWM pin controls the switching of the external
MOSFETs. The driver logic operates in a noninverting
configuration. The PWM input stage should be driven
by a signal with fast transition times, like those pro-
vided by a PWM controller or logic gate, (< 200 ns).
The PWM input functions as a logic input and is not
intended for applications where a slow changing input
voltage is used to generate a switching output when
the input switching threshold voltage is reached.
Enable
The device is enabled by edge sensing of transitions
on PWM, high or low. A minimum PWM frequency of
2 kHz is required to keep the device enabled. When
continuous PWM transitions are present, and after
power-on reset time has elapsed, OUT
H
and OUT
L
will
become active.
Low-Side Driver
The supplies for the low-side driver are V
DD
and GND.
During shutdown, OUT
L
is held low.
High-Side Driver
The high-side driver is isolated from the substrate to
create a floating high-side driver so that an N-Channel
MOSFET can be used for the high-side switch. The
supplies for the high-side driver are BOOT and LX.
The voltage is supplied by a floating bootstrap capaci-
tor, which is continually recharged by the switching
action of the output. During shutdown OUT
H
is held
low.
Bootstrap Circuit
The internal bootstrap diode and a bootstrap capacitor
form a charge pump that supplies voltage to the BOOT
pin. An integrated bootstrap diode replaces the exter-
nal Schottky diode and bootstrap only a capacitor is
necessary to complete the circuit. The bootstrap
capacitor is sized according to.
C
BOOT
= (Q
Gate
/Δ
VBOOT- LX
) x 10
where Q
GATE
is the gate charge needed to turn on the
high-side MOSFET and
Δ
V
BOOT-LX
is the amount of
droop allowed in the bootstrap supply voltage when
the high-side MOSFET is driven high. The bootstrap
capacitor value is typically 0.1
µF
to 1
µF.
The boot-
strap capacitor voltage rating must be greater than
V
DD
+ 5 V to withstand transient spikes and ringing.
Shoot-Through Protection
The external MOSFETs are prevented from conduct-
ing at the same time during transitions. Break-before-
make circuits monitor the voltages on the LX pin and
the OUT
L
pin and control the switching as follows:
When the signal on PWM goes low, OUT
H
will go low
after an internal propagation delay. After the voltage
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5
Document Number: 72718
S-61692–Rev. E,
04-Sep-06
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