Preliminary Data Sheet PD60214 Rev B
IR20153S & (PbF)
HIGH SIDE DRIVER WITH RECHARGE
Features
•
•
•
•
•
•
•
•
•
•
Floating channel designed for bootstrap operation
Fully operational up to 150V
Tolerant to negative transient voltage, dV/dt immune
Gate drive supply range from 5V to 20V
Undervoltage lockout
Internal recharge FET for bootstrap refresh
Internal deadtime of 11µs and 0.8µs
CMOS Schmitt-triggered input logic
Output out of phase with input
Reset input
Split pull-up and pull-down gate drive pins
Also available LEAD-FREE (PbF)
Product Summary
V
OFFSET
I
O
+/-
V
OUT
t
on/off
150V max.
400mA @ VBS=7V,
1.5A @ VBS=16V
5-20V
1.0 and 0.3
µs
Description
The IR20153S is a high voltage, high speed power MOSFET driver . Proprietary HVIC
and latch immune CMOS technologies enable ruggedized monolithic construction. The
logic input is compatible with standard CMOS output down to 3.3V. The output driver
features a high pulse current buffer stage designed for minimum cross-conduction. The
floating channel can be used to drive an N-channel power MOSFET in the high or low
side configuration which operates up to 150 volts.
Package
8-Lead SOIC
Typical Connection
up to 150V
VCC
IN
VCC
IN
GND
VB
HOH
HOL
VS
RESET
RESET
(Refer to Lead Assignments
for correct configuration).
This/These diagram(s) show
electrical connections only.
Please refer to our Applica-
tion Notes and DesignTips
for proper circuit board lay-
out.
Load
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1
IR20153S & (PbF)
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-
eters are absolute voltages referenced to GND, all currents are defined positive into any lead. This is a stress only rating
and operation of the device at these or any conditions exceeding those indicated in the operational sections of this
specifications is not implied.
Symbol
V
B
V
S
V
HO
V
CC
V
IN
dV/dt
T
J
T
S
T
L
Definition
High side driver output stage voltage
High side floating supply offset voltage
Output voltage gate high connection
Low side fixed supply voltage
Input voltage (IN and RESET)
Allowable offset voltage slew rate
Junction temperature
Storage temperature
Lead temperature (soldering, 10 seconds)
Min.
-5.0
- 8.0
V
S
- 0.3
-0.3
—
-55
-55
—
Max.
170
150
V
B
+ 0.3
25
-0.3
50
150
150
300
Units
V
V
CC
+0.3
V/nsec
°C
Recommended Operating Conditions
The input/output logic timing diagram is shown in Fig. 2. For proper operation the device should be used within the
recommended conditions. All voltage parameters are absolute voltages referenced to GND. The VS offset rating is tested
with all suppliers biased at Vcc=5V and VBS=7V.
Symbol
V
B
V
S
V
HO
V
CC
V
IN
T
A
Definition
High side driver output stage voltage
High side floating supply offset voltage
Output voltage gate high connection
Supply voltage
Input voltage (IN and RESET)
Ambient temperature
Min.
V
S
+ 5
-1.6
V
S
5
0
-55
Max.
V
S
+ 20
150
V
B
20
Vcc
150
Units
V
°C
2
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IR20153S & (PbF)
Electrical Characteristics
Unless otherwise specified, VCC = 5V, VBS = 7V, VS = 0V, IN = 0V, RES = 5V, load R = 50
Ω
, C = 6.8nF (see Figure 3).
Unless otherwise noted, these specifications apply for an operating ambient temperature of T
A
=25
°
C.
Symbol
V
CCUV+
V
CCUV-
V
CCUVHYS
IQCC
VBSUV+
VBSUV-
VBSUVHYS
IQBS1
IQBS2
Definition
V
CC
supply undervoltage positive going threshold
V
CC
supply undervoltage negative going threshold
V
CC
supply undervoltage lockout hysteresis
V
CC
supply current
VBS supply undervoltage positive going threshold
VBS supply undervoltage negative going threshold
VBS supply undervoltage lockout hysteresis
VBS supply current
VBS supply current
Min. Typ. Max. Units Test Conditions
—
2.5
0.01
—
—
2.5
0.01
—
—
—
—
0.3
—
—
—
0.3
—
—
4.3
—
0.60
400
4.3
—
0.60
100
200
uA
V
VCC = 3.6V & 6.5V
VBS rising from 0V
VBS dropping
from 5V
V
V
CC
rising from 0V
V
CC
dropping
from 5V
VCC Supply Characteristics
VBS Supply Characteristics
µ
A
µ
A
static mode, VBS =
7V, IN = 0V or 5V
static mode, VBS =
16V, IN = 0V or 5V
VB. VS Supply Characteristics
ILK
Io+1
Io+2
tr1
tr2
Io-1
Io-2
tf1
tf2
ton
toff
tres,off
Offset supply leakage current
Peak output source current
Peak output source current
Output rise time
Output rise time
Peak output sink current
Peak output sink current
Output fall time
Output fall time
Input-to-Output Turn-on propogation delay
(50% input level to 10% output level)
Input-to-Output Turn-off propogation delay
(50% input level to 90% output level)
RES-to-Output Turn-off propogation delay
(50% input level to 90% [tphl] output levels)
—
0.3
0.9
—
0.3
0.9
—
250
800
—
—
250
800
—
—
—
—
400
1500
0.2
0.1
400
1500
0.2
0.1
1.0
50
—
—
0.4
0.2
—
—
0.4
0.2
2.0
µ
A
mA
mA
VB = VS = 150V
Gate Driver Characteristics
VBS = 16V
VBS = 16V
IN = 5V
VBS = 16V, IN = 5V
IN = 5V
VBS = 16V, IN = 5V
µ
sec
µ
sec
mA
mA
µ
sec
µ
sec
µ
sec
µ
sec
µ
sec
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3
IR20153S & (PbF)
Electrical Characteristics
Unless otherwise specified, VCC = 5V, VBS = 7V, VS = 0V, IN = 0V, RES = 5V, load R = 50
Ω
, C = 6.8nF (see Figure 3).
Unless otherwise noted, these specifications apply for an operating ambient temperature of T
A
=25
°
C.
Symbol
tres,on
Definition
RES-to-Output Turn-On Propogation Delay
(50% input level to 10% [tplh] output levels)
Min. Typ. Max. Units Test Conditions
-
1.0
2.0
Gate Driver Characteristics
V
CC
Supply Characteristics cont.
µ
sec
Input Characteristics
VINH
VINL
RIN
VH_RES
VL_RES
RRES
ton_rech
toff_rech
VRECH
DTHOFF
DTHON
High Logic Level Input Threshold
Low Logic Level Input Threshold
High Logic Level Input Resistance
High Logic Level RES Input Threshold
Low Logic Level RES Input Threshold
High Logic Level RES Input Resistance
Recharge Transistor Turn-On Propogation Delay
Recharge Transistor Turn-Off Propogation Delay
Recharge Output Transistor On-State Voltage Drop
High Side Turn-Off to Recharge gate Turn-On
Recharge gate Turn-Off to High Side Turn-On0.
3
-
40
3
-
40
7
-
-
7
0.4
-
-
100
-
-
100
11
0.3
-
11
0.8
-
1.4
220
-
1.4
220
15
0.9
1.2
15
1.5
V
V
k
Ω
V
V
k
Ω
Recharge Characteristics
(see Figure 3a)
µ
sec
µ
sec
V
VS = 5V
IS = 1mA, IN = 5V
Deadtime Characteristics
µ
sec
µ
sec
4
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IR20153S & (PbF)
A True table for Vcc, VBS, RESET, IN, H
O
and RechFET is shown as follows. This truth table is for ACTIVE
LOW IN.
RESET-
IN-
RechFET
Vcc
VBS
H
O
<VccUVLO-
<VccUVLO-
<VccUVLO-
<VccUVLO-
<VccUVLO-
<VccUVLO-
<VccUVLO-
<VccUVLO-
>VccUVLO+
>VccUVLO+
>VccUVLO+
>VccUVLO+
>VccUVLO+
>VccUVLO+
>VccUVLO+
>VccUVLO+
<VBSUVLO-
<VBSUVLO-
<VBSUVLO-
<VBSUVLO-
>VBSUVLO+
>VBSUVLO+
>VBSUVLO+
>VBSUVLO+
<VBSUVLO-
<VBSUVLO-
<VBSUVLO-
<VBSUVLO-
>VBSUVLO+
>VBSUVLO+
>VBSUVLO+
>VBSUVLO+
HIGH
HIGH
LOW
LOW
HIGH
HIGH
LOW
LOW
HIGH
HIGH
LOW
LOW
HIGH
HIGH
LOW
LOW
HIGH
LOW
HIGH
LOW
HIGH
LOW
HIGH
LOW
HIGH
LOW
HIGH
LOW
HIGH
LOW
HIGH
LOW
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
ON
OFF
OFF
ON
ON
ON
ON
ON
ON
ON
ON
ON
OFF
ON
ON
ON
1
OFF
1
ON
1
ON
1
RESET = HIGH indicates that high side MOSFET is allowed to be turned on.
RESET = LOW indicates that high side MOSFET is OFF.
IN = LOW indicates that high side MOSFET is on.
IN = HIGH indicates that high side MOSFET is off.
RechFET = ON indicates that the recharge MOSFET is on.
RechFET = OFF indicates that the recharge MOSFET is off.
1
Note: Refer to the RESET functionality graph of Figure 7, for VCC and VBS voltage ranges under which
the functionality is normal.
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