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MT46H16M32LFCM-5:B TR: 产品描述IC lpddr sdram 512mbit 90vfbga; 产品类别存储; 文件大小3MB，共98页; 制造商Micron(美光); 官网地址http://www.micron.com/; 标准

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MT46H16M32LFCM-5:B TR概述

IC lpddr sdram 512mbit 90vfbga

MT46H16M32LFCM-5:B TR规格参数

参数名称	属性值
Datasheets
MT46H 32M16,16M32
Product Photos
90 VFBGA Package
Standard Package	1
Category	Integrated Circuits (ICs)
Family	Memory
系列 Packaging	Cut Tape (CT)
Format - Memory	RAM
Memory Type	Mobile LPDDR SDRAM
Memory Size	512M (16M x 32)
速度 Speed	200MHz
Interface	Parallel
Voltage - Supply	1.7 V ~ 1.95 V
Operating Temperature	0°C ~ 70°C
封装 / 箱体 Package / Case	90-VFBGA
Supplier Device Package	90-VFBGA (10x13)
Other Names	557-1379-1MT46H16M32LFCM5BTR

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512Mb: x16, x32 Mobile LPDDR SDRAM

Features

Mobile Low-Power DDR SDRAM

MT46H32M16LF – 8 Meg x 16 x 4 Banks

MT46H16M32LF – 4 Meg x 32 x 4 Banks

Features

•

DDQ

= 1.70–1.95V

1.2V I/O option V

DDQ

= 1.14–1.30V

Bidirectional data strobe per byte of data (DQS)

Internal, pipelined double data rate (DDR)architec-

ture; two data accesses per clock cycle

Differential clock inputs (CK and CK#)

Commands entered on each positive CK edge

DQS edge-aligned with data for READs;center-

aligned with data for WRITEs

4 internal banks for concurrent operation

Data masks (DM) for masking write data—one mask

per byte

Programmable burst lengths (BL): 2, 4, 8, or 16

Concurrent auto precharge option is supported

Auto refresh and self refresh modes

1.8V LVCMOS-compatible inputs

On-chip temp sensor to control self refresh rate

Partial-array self refresh (PASR)

Deep power-down (DPD)

Status read register (SRR)

Selectable output drive strength (DS)

Clock stop capability

64ms refresh

Table 1: Key Timing Parameters (CL = 3)

Speed Grade

-5

-54

-6

-75

Clock Rate (MHz)

200

185

166

133

Access Time

5.0ns

6.0ns

Options

•

DDQ

–

1.8V/1.8V

–

1.8V/1.2V

•

Configuration

–

32 Meg x 16 (8 Meg x 16 x 4 banks)

–

16 Meg x 32 (4 Meg x 32 x 4 banks)

•

Row-size option

–

JEDEC-standard option

–

Reduced page-size option

•

Plastic green package

–

60-ball VFBGA (8mm x 9mm)

–

90-ball VFBGA (10mm x 13mm)

–

90-ball VFBGA (9mm x 13mm)

•

Timing – cycle time

–

5ns @ CL = 3

–

5.4ns @ CL = 3

–

6ns @ CL = 3

–

7.5ns @ CL = 3

•

Power

–

Standard I

DD2

DD6

–

Low-power I

DD2

DD61

•

Operating temperature range

–

Commercial (0˚ to +70˚C)

–

Industrial (–40˚C to +85˚C)

•

Design revision

Notes:

Marking

32M16

16M32

-5

-54

-6

-75

None

1. Contact factory for availability.

2. Only available for x16 configuration.

3. Only available for x32 configuration.

PDF: 09005aef82d5d305

512mb_ddr_mobile_sdram_t47m.pdf – Rev. I 12/09 EN

Products and specifications discussed herein are subject to change by Micron without notice.

Micron Technology, Inc. reserves the right to change products or specifications without notice.

512Mb: x16, x32 Mobile LPDDR SDRAM

General Description ......................................................................................................................................... 8

Functional Block Diagrams ............................................................................................................................... 9

Ball Assignments and Descriptions ................................................................................................................. 11

Package Dimensions ...................................................................................................................................... 15

Electrical Specifications .................................................................................................................................. 18

Electrical Specifications – I

Parameters ........................................................................................................ 22

Electrical Specifications – AC Operating Conditions ......................................................................................... 26

Output Drive Characteristics ........................................................................................................................... 30

Functional Description ................................................................................................................................... 34

Commands .................................................................................................................................................... 35

DESELECT ................................................................................................................................................ 36

NO OPERATION ........................................................................................................................................ 36

LOAD MODE REGISTER ............................................................................................................................ 36

ACTIVE ..................................................................................................................................................... 36

READ ........................................................................................................................................................ 37

WRITE ...................................................................................................................................................... 38

PRECHARGE ............................................................................................................................................. 39

BURST TERMINATE .................................................................................................................................. 40

AUTO REFRESH ........................................................................................................................................ 40

SELF REFRESH ........................................................................................................................................... 41

DEEP POWER-DOWN ................................................................................................................................ 41

Truth Tables ................................................................................................................................................... 42

State Diagram ................................................................................................................................................ 47

Initialization .................................................................................................................................................. 48

Standard Mode Register .................................................................................................................................. 51

Burst Length .............................................................................................................................................. 51

Burst Type ................................................................................................................................................. 52

CAS Latency .............................................................................................................................................. 53

Operating Mode ......................................................................................................................................... 54

Extended Mode Register ................................................................................................................................. 55

Temperature-Compensated Self Refresh .................................................................................................... 55

Partial-Array Self Refresh ........................................................................................................................... 56

Output Drive Strength ................................................................................................................................ 56

Status Read Register ....................................................................................................................................... 57

Bank/Row Activation ...................................................................................................................................... 59

READ Operation ............................................................................................................................................. 60

WRITE Operation ........................................................................................................................................... 71

PRECHARGE Operation .................................................................................................................................. 83

Auto Precharge ............................................................................................................................................... 83

Concurrent Auto Precharge ........................................................................................................................ 84

AUTO REFRESH Operation ............................................................................................................................. 89

SELF REFRESH Operation .............................................................................................................................. 90

Power-Down .................................................................................................................................................. 91

Deep Power-Down .................................................................................................................................... 93

Clock Change Frequency ................................................................................................................................ 95

Revision History ............................................................................................................................................. 96

Rev. I, Production – 12/09 ........................................................................................................................... 96

Rev. H, Production – 03/09 .......................................................................................................................... 96

Rev. G, Production – 02/09 .......................................................................................................................... 96

Rev. F, Production – 10/08 .......................................................................................................................... 96

Contents

PDF: 09005aef82d5d305

512mb_ddr_mobile_sdram_t47m.pdf – Rev. I 12/09 EN

Micron Technology, Inc. reserves the right to change products or specifications without notice.

512Mb: x16, x32 Mobile LPDDR SDRAM

Table 1: Key Timing Parameters (CL = 3) .......................................................................................................... 1

Table 2: Configuration Addressing 512 ............................................................................................................. 2

Table 3: VFBGA Ball Descriptions .................................................................................................................. 13

Table 4: Absolute Maximum Ratings .............................................................................................................. 18

Table 5: AC/DC Electrical Characteristics and Operating Conditions ............................................................... 18

Table 6: 1.2V I/O AC/DC Electrical Characteristics and Operating Conditions ................................................. 19

Table 7: Capacitance (x16, x32) ...................................................................................................................... 20

Table 8: I

Specifications and Conditions (x16) ............................................................................................ 22

Table 9: I

Specifications and Conditions (x32) ............................................................................................ 23

Table 10: I

DD6

Specifications and Conditions .................................................................................................. 24

Table 11: Electrical Characteristics and Recommended AC Operating Conditions ............................................ 26

Table 12: Target Output Drive Characteristics (Full Strength) .......................................................................... 30

Table 13: Target Output Drive Characteristics (Three-Quarter Strength) .......................................................... 31

Table 14: 1.2V I/O Target Output Drive Characteristics (Three-Quarter Strength) ............................................ 32

Table 15: Target Output Drive Characteristics (One-Half Strength) ................................................................. 33

Table 16: Truth Table – Commands ............................................................................................................... 35

Table 17: DM Operation Truth Table ............................................................................................................. 36

Table 18: Truth Table – Current State Bank

– Command to Bank

............................................................... 42

Table 19: Truth Table – Current State Bank

– Command to Bank

.............................................................. 43

Table 20: Truth Table – CKE .......................................................................................................................... 46

Table 21: Burst Definition Table .................................................................................................................... 52

List of Tables

PDF: 09005aef82d5d305

512mb_ddr_mobile_sdram_t47m.pdf – Rev. I 12/09 EN

Micron Technology, Inc. reserves the right to change products or specifications without notice.

MT46H16M32LFCM-5:B TR

MT46H16M32LFCM-5:B TR概述

MT46H16M32LFCM-5:B TR规格参数

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