A3967
Microstepping Driver with Translator
Features and Benefits
▪
±750 mA, 30 V output rating
▪
Satlington® sink drivers
▪
Automatic current-decay mode detection/selection
▪
3.0 to 5.5 V logic supply voltage range
▪
Mixed, fast, and slow current-decay modes
▪
Internal UVLO and thermal shutdown circuitry
▪
Crossover-current protection
Description
The A3967 is a complete microstepping motor driver with built-
in translator. It is designed to operate bipolar stepper motors in
full-, half-, quarter-, and eighth-step modes, with output drive
capability of 30 V and ±750 mA. The A3967 includes a fixed
off-time current regulator that has the ability to operate in slow,
fast, or mixed current-decay modes. This current-decay control
scheme results in reduced audible motor noise, increased step
accuracy, and reduced power dissipation.
The translator is the key to the easy implementation of the
A3967. By simply inputting one pulse on the STEP input the
motor will take one step (full, half, quarter, or eighth depending
on two logic inputs). There are no phase-sequence tables, high-
frequency control lines, or complex interfaces to program. The
A3967 interface is an ideal fit for applications where a complex
μP
is unavailable or over-burdened.
Internal circuit protection includes thermal shutdown with
hysteresis, under-voltage lockout (UVLO) and crossover-
current protection. Special power-up sequencing is not
required.
The A3967 is supplied in a 24-pin SOIC, which is lead (Pb)
free with 100% matte tin leadframe plating. Four pins are
fused internally for enhanced thermal dissipation. The pins
are at ground potential and need no insulation.
Package: 24-pin SOIC with internally
fused pins (suffix LB)
Not to scale
Functional Block Diagram
LOGIC
SUPPLY
V
CC
REF.
SUPPLY
REF
1
14
LOAD
SUPPLY
UVLO
AND
FAULT
DETECT
V
BB1
20
÷8
DAC
+
-
SENSE
RC
1
23
PWM LATCH
BLANKING
MIXED DECAY
OUT
1A
16
OUT
1B
21
3
STEP
10
PWM TIMER
TRANSLATOR
DIR
11
RESET
22
MS
1 12
MS
2 13
SENSE
1
CONTROL LOGIC
17
5
V
BB2
SLEEP
3
ENABLE
15
V
PF
24
OUT
2A
PWM TIMER
3
PWM LATCH
BLANKING
MIXED DECAY
9
PFD
2
OUT
2B
4
RC
2
+
DAC
6
7
18 19
-
8
SENSE
2
Dwg. FP-050-3A
26184.24H
A3967
Selection Guide
Part Number
A3967SLBTR-T
Microstepping Driver with Translator
Packing
24-pin SOIC with internally fused pins
Package
1000 per reel
Absolute Maximum Ratings
Characteristic
Load Supply Voltage
Logic Supply Voltage
Logic Input Voltage Range
Sense Voltage
Reference Voltage
Output Current
Package Power Dissipation
Operating Ambient Temperature
Maximum Junction Temperature
Storage Temperature
Symbol
V
BB
V
CC
V
IN
V
SENSE
V
REF
I
OUT
P
D
T
A
T
J
(max)
T
stg
Output current rating may be limited by duty cycle, am-
bient temperature, and heat sinking. Under any set of
conditions, do not exceed the specified current rating
or a junction temperature of 150°C.
See graph
Range S
Fault conditions that produce excessive junction temperature will activate
the device’s thermal shutdown circuitry. These conditions can be toler-
ated but should be avoided.
Continuous
Peak
t
w
> 30 ns
t
w
< 30 ns
Notes
Rating
30
7.0
–0.3 to 7.0
–1 to 7.0
0.68
V
CC
±750
±850
–
–20 to 85
150
–55 to 150
Units
V
V
V
V
V
mA
mA
mA
–
ºC
ºC
ºC
Thermal Characteristics
Characteristic
Package Thermal Resistance, Junction
to Ambient
Symbol
R
θJA
Test Conditions*
2
2-layer PCB, 1.3 in. 2-oz. exposed copper
Value
50
35
Units
ºC/W
ºC/W
4-layer PCB, based on JEDEC standard
*Additional thermal information available on Allegro website.
ALLOWABLE PACKAGE POWER DISSIPATION (W)
5
R
JT
= 6.0 C/W
4
3
R
JA
= 35°C/W
2
R
JA
= 50°C/W
1
0
25
50
75
100
TEMPERATURE IN C
125
150
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
2
A3967
Microstepping Driver with Translator
ELECTRICAL CHARACTERISTICS at T
A
= +25°C, V
BB
= 30 V, V
CC
= 3.0 V to 5.5V (unless otherwise
noted)
Limits
Characteristic
Output Drivers
Load Supply Voltage Range
Output Leakage Current
Output Saturation Voltage
V
BB
I
CEX
V
CE(sat)
Operating
During sleep mode
V
OUT
= V
BB
V
OUT
= 0 V
Source driver, I
OUT
= -750 mA
Source driver, I
OUT
= -400 mA
Sink driver, I
OUT
= 750 mA
Sink driver, I
OUT
= 400 mA
Clamp Diode Forward Voltage
Motor Supply Current
V
F
I
BB
I
F
= 750 mA
I
F
= 400 mA
Outputs enabled
RESET high
Sleep mode
Control Logic
Logic Supply Voltage Range
Logic Input Voltage
Logic Input Current
Maximum STEP Frequency
Blank Time
Fixed Off Time
V
CC
V
IN(1)
V
IN(0)
I
IN(1)
I
IN(0)
f
STEP
t
BLANK
t
off
R
t
= 56 kΩ, C
t
= 680 pF
R
t
= 56 kΩ, C
t
= 680 pF
V
IN
= 0.7V
CC
V
IN
= 0.3V
CC
Operating
3.0
0.7V
CC
–
-20
-20
500*
700
30
5.0
–
–
<1.0
<1.0
–
950
38
5.5
–
0.3V
CC
20
20
–
1200
V
V
V
μA
μA
kHz
ns
4.75
0
–
–
–
–
–
–
–
–
–
–
–
–
–
<1.0
<-1.0
1.9
1.7
0.65
0.21
1.4
1.1
–
–
–
30
30
20
-20
2.1
2.0
1.3
0.5
1.6
1.4
5.0
200
20
V
V
μA
μA
V
V
V
V
V
V
mA
μA
μA
Symbol Test Conditions
Min.
Typ.
Max.
Units
46
μs
continued next page …
Table 1. Microstep Resolution Truth Table
MS1
L
H
L
H
MS2
L
L
H
H
Resolution
Full step (2 phase)
Half step
Quarter step
Eighth step
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
3
A3967
Microstepping Driver with Translator
ELECTRICAL CHARACTERISTICS (continued) at T
A
= +25°C, V
BB
= 30 V, V
CC
= 3.0 V to 5.5V (unless
otherwise noted)
Limits
Characteristic
Control Logic (cont’d)
Mixed Decay Trip Point
Ref. Input Voltage Range
Reference Input Impedance
Gain (G
m
) Error
(note 3)
Thermal Shutdown Temp.
Thermal Shutdown Hysteresis
UVLO Enable Threshold
UVLO Hysteresis
Logic Supply Current
TJ
∆T
J
V
UVLO
∆V
UVLO
I
CC
Outputs enabled
Outputs off
Sleep mode
Increasing VCC
PFDH
PFDL
V
REF
Z
REF
E
G
VREF = 2 V, Phase Current = 38.37% †
VREF = 2 V, Phase Current = 70.71% †
VREF = 2 V, Phase Current = 100.00% †
Operating
–
–
1.0
120
–
–
–
–
–
2.45
0.05
–
–
–
0.6V
CC
0.21V
CC
–
160
–
–
–
165
15
2.7
0.10
50
–
–
–
–
V
CC
200
±10
±5.0
±5.0
–
–
2.95
–
65
9.0
20
V
V
V
kΩ
%
%
%
°C
°C
V
V
mA
mA
μA
Symbol
Test Conditions
Min.
Typ.
Max.
Units
* Operation at a step frequency greater than the specified minimum value is possible but not warranteed.
† 8 microstep/step operation.
NOTES: 1. Typical Data is for design information only.
2. Negative current is defined as coming out of (sourcing) the specified device terminal.
3. E
G
= ([V
REF
/8] – V
SENSE
)/(V
REF
/8)
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
4
A3967
Microstepping Driver with Translator
Functional Description
Device Operation.
The A3967 is a complete microstep-
ping motor driver with built in translator for easy operation
with minimal control lines. It is designed to operate bipolar
stepper motors in full-, half-, quarter- and eighth-step
modes. The current in each of the two output full bridges
is regulated with
fi
xed off time pulse-width modulated
(PWM) control circuitry. The full-bridge current at each
step is set by the value of an external current sense resis-
tor (R
S
), a reference voltage (V
REF
), and the DACs output
voltage controlled by the output of the translator.
At power up, or reset, the translator sets the DACs and
phase current polarity to initial home state (see
fi
gures for
home-state conditions), and sets the current regulator for
both phases to mixed-decay mode. When a step command
signal occurs on the STEP input the translator automati-
cally sequences the DACs to the next level (see table 2 for
the current level sequence and current polarity). The mic-
rostep resolution is set by inputs MS
1
and MS
2
as shown in
table 1. If the new DAC output level is lower than the pre-
vious level the decay mode for that full bridge will be set
by the PFD input (fast, slow or mixed decay). If the new
DAC level is higher or equal to the previous level then the
decay mode for that Full bridge will be slow decay. This
automatic current-decay selection will improve microstep-
ping performance by reducing the distortion of the current
waveform due to the motor BEMF.
Reset Input (RESET).
The RESET input (active low)
sets the translator to a predefined home state (see
fi
gures
for home state conditions) and turns off all of the outputs.
STEP inputs are ignored until the RESET input goes high.
Step Input (STEP).
A low-to-high transition on the
STEP input sequences the translator and advances the
motor one increment. The translator controls the input to
the DACs and the direction of current
fl
ow in each wind-
ing. The size of the increment is determined by the state of
inputs MS
1
and MS
2
(see table 1).
Microstep Select (MS
1
and MS
2
).
Input terminals
MS1 and MS
2
select the microstepping format per
table 1. Changes to these inputs do not take effect until the
STEP command (see
fi
gure).
Direction Input (DIR).
The state of the DIRECTION
input will determine the direction of rotation of the motor.
Internal PWM Current Control.
Each full bridge is
controlled by a
fi
xed off-time PWM current-control cir-
cuit that limits the load current to a desired value (I
TRIP
).
Initially, a diagonal pair of source and sink outputs are
enabled and current
fl
ows through the motor winding and
R
S
. When the voltage across the current-sense resistor
equals the DAC output voltage, the current-sense compara-
tor resets the PWM latch, which turns off the source driver
(slow-decay mode) or the sink and source drivers (fast- or
mixed-decay modes).
The maximum value of current limiting is set by the
selection of R
S
and the voltage at the V
REF
input with a
transconductance function approximated by:
I
TRIP
max = V
REF
/8R
S
The DAC output reduces the V
REF
output to the cur-
rent-sense comparator in precise steps (see table 2 for %
I
TRIP
max
at each step).
I
TRIP
= (% I
TRIP
max/100) x I
TRIP
max
Fixed Off-Time.
The internal PWM current-control
circuitry uses a one shot to control the time the driver(s)
remain(s) off. The one shot off-time, t
off
, is determined by
the selection of an external resistor (R
T
) and capacitor (C
T
)
connected from the RC timing terminal to ground. The off
time, over a range of values of C
T
= 470 pF to 1500 pF and
R
T
= 12 kΩ to 100 kΩ is approximated by:
t
off
= R
T
C
T
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
5
stm32/stm8
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
