DEMO MANUAL DC1746A
LTM2881:
Isolated RS485/RS422
µModule Transceiver + Power
DESCRIPTION
Demonstration circuit 1746A is an isolated RS485/RS422
μModule
®
transceiver + power featuring the LTM
®
2881.
The demo circuit is a 2500V
RMS
galvanically isolated
RS485/RS422 transceiver interface. The demo circuit
features an EMI optimized circuit configuration and printed
circuit board layout. All components are integrated into
the μModule transceiver. The demo circuit operates from
a single external supply on V
CC
. The part generates the
output voltage V
CC2
and communicates all necessary
signaling across the isolation barrier using LTC’s isolator
μModule technology.
Design files for this circuit board are available at
http://www.linear.com/demo
L,
LT, LTC, LTM, μModule, Linear Technology and the Linear logo are registered trademarks of
Linear Technology Corporation. All other trademarks are the property of their respective owners.
PERFORMANCE SUMMARY
SYMBOL
V
CC
V
CC2
f
MAX
V
IORM
PARAMETER
Input Supply Range
Output Voltage
Maximum Data rate
Maximum Working Insulation Voltage
Common Mode Transient Immunity
(T
A
= 25°C)
CONDITIONS
LTM2881-5
LTM2881-3
I
LOAD
= 0mA to 100mA, DE = 0V
SLO
= V
CC2
GND to GND2
MIN
4.5
3.0
4.7
20
560
400
30
TYP
5
3
5
MAX
5.5
3.6
UNITS
V
V
V
Mbps
V
DC
V
RMS
kV/μs
OPERATING PRINCIPLES
The LTM2881 contains an isolated DC/DC converter, de-
livering power to V
CC2
at 5V from the input supply, V
CC
.
Isolation is maintained by the separation of GND and GND2
where significant operating voltages and transients can
exist without affecting the operation of the LTM2881. The
logic side ON pin enables or shuts down the LTM2881.
RS485/RS422 signaling is controlled by the logic inputs
DE, DI, TE and
RE.
Connection to the transceiver pins (A,
B, Y and Z) allows full- or half-duplex operation on the
isolated side of the demo circuit. A full-/half-duplex switch
is included on the demo circuit to ease setting the system
configuration. The
SLO
pin configures the slew rate of the
driver output pins Y and Z.
Data is transmitted out the driver pins Y and Z from the
input DI with DE set on. Data is received through the dif-
ference in A and B to the output RO with
RE
set on.
The demo circuit has been designed and optimized for low
RF emissions. To this end some features of the LTM2881
are not available for evaluation on the demo circuit. The
logic supply voltage, V
L
, is tied to V
CC
on the demo circuit.
All control signals are selectable by jumper programming
only, including ON,
RE,
DE, TE and
SLO.
The spare logic
channel D
IN
to D
OUT
is not available.
dc1746af
1
DEMO MANUAL DC1746A
OPERATING PRINCIPLES
EMI mitigation techniques used include the following:
1. Four layer PCB, allowing for isolated side to logic side
‘bridge’ capacitor. The bridge capacitor is formed be-
tween an inner layer of floating copper which overlaps
the logic side and isolated side ground planes. This
structure creates two series capacitors, each with ap-
proximately 0.008" of insulation, supporting the full
dielectric withstand rating of 2500V
RMS
. The bridge
capacitor provides a low impedance return path for
injected currents due to parasitic capacitances of the
LTM2881’s signal and power isolating elements.
2. Discrete bridge capacitors (C3, C4) mounted between
GND2 and GND. The discrete capacitors provide ad-
ditional attenuation at frequencies below 400MHz.
Capacitors are safety rated type Y2, manufactured by
Murata, part # GA342QR7GF471KW01L.
3. Board/ground plane size has been minimized. This
reduces the dipole antenna formed between the logic
side and isolated side ground planes.
4. Top signal routing and ground floods have been opti-
mized to reduce signal loops, minimizing differential
mode radiation.
5. Common mode filtering is integrated into the input
pin header and output DB9 connector. Filtering helps
to reduce emissions caused by conducted noise and
minimizes the effects of cabling to common mode
emissions.
6. A combination of low ESL and high ESR decoupling is
used. A low ESL ceramic capacitor is located close to
the module minimizing high frequency noise conduction.
High ESR tantalum capacitors are included to minimize
board resonances and prevent voltage spikes due to hot
plugging of the input supply voltage.
EMI performance is shown in Figure 1, measured using
a gigahertz transverse electromagnetic (GTEM) cell and
method detailed in IEC 61000-4-20, “Testing and Mea-
surement Techniques—Emission and Immunity Testing
in Transverse Electromagnetic Waveguides”.
60
50
40
30
dBμV/m
20
10
0
–10
–20
–30
0 100 200 300 400 500 600 700 800 900 1000
FREQUENCY (MHz)
DC1746A F01
CISPR 22 CLASS B LIMIT
DC1746A-B
DETECTOR = QuasiPeak
RBW = 120kHz
VBW = 300kHz
SWEEP TIME = 17s
# OF POINTS = 501
Figure 1. DC1746A Radiated Emissions
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2
DEMO MANUAL DC1746A
QUICK START PROCEDURE
Demonstration circuit 1746A is easy to set up and evalu-
ate the performance of the LTM2881. Refer to Figure 2
for proper measurement equipment setup and follow the
procedure below.
NOTE: When measuring the input or output voltage ripple
or high speed signals, care must be taken to avoid a long
ground lead on the oscilloscope probe.
1. Install jumpers in following positions: (all are default
except JP5 and SW1)
JP1 ON
JP2 ON
JP3 ON
JP4 ON
JP5 OFF
SW1 HALF DUPLEX
2. With power off, connect the input power supply to V
CC
and GND on pin header J1.
3. Turn on the power at the input.
NOTE: Make sure that the input voltage does not exceed
6V.
4. Check for the proper output voltage. V
CC2
= 5V, this can
be measured between probe points V2 and C.
5. Once the proper output voltage is established, connect
a function generator to pin DI and set to square wave
with a low of 0V, high = V
CC
. Set frequency to 10MHz
(20Mbps). Enable output of function generator.
6. Connect oscilloscope to pin RO and observe 10MHz
waveform. This demonstration shows data that is
transmitted from DI, loops back through half-duplex
connection, and out of RO.
Figure 2. Demo Board Setup
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3
DEMO MANUAL DC1746A
PCB LAYOUT
Layer 1. Top Layer
Layer 2. Ground Plane
Layer 3. Signal Layer
Layer 4. Bottom Layer
PARTS LIST
ITEM
1
QTY
1
REFERENCE
U1
PART DESCRIPTION
I.C., LTM2881CY-3
I.C., LTM2881CY-5
Hardware/Components (For Demo Board Only)
2
3
4
5
6
7
8
9
10
2
1
2
1
1
1
5
5
1
C1, C5
C2
C3, C4
J1
J1
J2
JP1-5
JP1-5
SW1
CAP TANT 10μF 10V 20% TAJA
.,
CAP CER 1μF 10V 20% 0508
.,
CAP CER 470pF 250V
AC
10% 1808
.,
0.1" DOUBLE ROW HEADER, 5
×
2 PIN
0.1" FERRITE PLATE, 5
×
2 HOLE
CON, FILTERED, DSUB 9-PIN
2mm SINGLE ROW HEADER, 3-PIN
SHUNT
SWITCH, DPDT, SMD
AVX TAJA106M010RNJ
MURATA LLL219R71A105MA01L
MURATA GA342QR7GF471KW01L
SAMTEC TSW-105-22-G-D
FAIR RITE 2644247101
KOBICONN 152-3609
SAMTEC TMM-103-02-L-S
SAMTEC 2SN-BK-G
COPAL CAS-220TA
MANUFACTURER/PART NUMBER
LINEAR LTM2881CY-3#PBF
LINEAR LTM2881CY-5#PBF
Required Circuit Components
dc1746af
4
DEMO MANUAL DC1746A
SCHEMATIC DIAGRAM
dc1746af
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation
that the interconnection of its circuits as described herein will not infringe on existing patent rights.
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