35A Highly Integrated SupIRBuck
®
Single-Input Voltage, Synchronous Buck Regulator
IR3846
FEATURES
•
Single 5V to 21V application
•
Wide Input Voltage Range from 1.5V to 21V with
external Vcc
•
Output Voltage Range: 0.6V to 0.86*PVin
•
0.5% accurate Reference Voltage
•
Enhanced line/load regulation with Feed-Forward
•
Programmable Switching Frequency up to
1.5MHz
•
Internal Digital Soft-Start
•
Enable input with Voltage Monitoring Capability
•
Remote Sense Amplifier with True Differential
Voltage Sensing
•
Thermally compensated current limit and Hiccup
Mode Over Current Protection
•
Smart LDO to enhance efficiency
•
Vp for tracking applications and sequencing
•
Vref is available externally to enable margining
•
External synchronization with Smooth Clocking
•
Dedicated output voltage sensing for power good
indication and overvoltage protection which
remains active even when Enable is low.
•
Enhanced Pre-Bias Start up
•
Body Braking to improve transient
•
Integrated MOSFET drivers and Bootstrap diode
•
Thermal Shut Down
•
Post Package trimmed rising edge dead-time
•
Programmable Power Good Output with tracking
•
Small Size 5mm x 7mm PQFN
•
Operating Junction Temp: -40
o
C<Tj<125
o
C
•
Lead-free, Halogen-free and RoHS Compliant
DESCRIPTION
The IR3846 SupIRBuck
®
is an easy-to-use, fully
integrated and highly efficient DC/DC regulator. The
onboard PWM controller and MOSFETs make IR3846
a space-efficient solution, providing accurate power
delivery for low output voltage and high current
applications.
IR3846 is a versatile regulator which offers
programmability of switching frequency and current
limit while operating in wide input and output voltage
range.
The switching frequency is programmable from 300
kHz to 1.5MHz for an optimum solution.
It also features important protection functions, such as
Over Voltage Protection (OVP), Pre-Bias startup,
hiccup current limit and thermal shutdown to give
required system level security in the event of fault
conditions.
APPLICATIONS
•
Netcom Applications
•
Embedded Telecom Systems
•
Server Application
•
Distributed Point of Load Power Architectures
•
Storage Applications
ORDERING INFORMATION
Base Part
Number
IR3846
Package Type
PQFN 5mm x 7mm
Standard Pack
Orderable Part
Number
IR3846MTRPBF
Form
Tape and Reel
Quantity
4000
IR3846
PBF
TR
M
Lead Free
Tape and Reel
Package Type
1
www.irf.com
© 2014 International Rectifier
Submit Datasheet Feedback
May 29, 2014
IR3846
BASIC APPLICATION
5V <Vin<21V
Vp
VCC
S_Ctrl
Vin PVin
Boot
SW
OCSet
Vsns
RS+
RS-
RSo
FB
Vo
PGood
PGood
Rt/Sync
Enable
Vref
Gnd
Comp
PGnd
Figure 1: IR3846 Basic Application Circuit
Figure 2: Efficiency [Vin=12V, Fsw=600kHz]
PIN DIAGRAM
5mm X 7mm POWER QFN
Top View
2
www.irf.com
© 2014 International Rectifier
Submit Datasheet Feedback
May 29, 2014
IR3846
FUNCTIONAL BLOCK DIAGRAM
Vin
Smart
LDO
DCM
VCC
THERMAL
SHUTDOWN
UVcc
+
+
E/A
+
-
Vref
Vp
UVcc
UVcc
TSD
OC
POR
OV
FAULT
CONTROL
VCC/
LDO_out
LGnd
Comp
Vp
Vref
VREF
0.6V
Boot
FAULT
HDrv
PVin
FB
FB
OVER
VOLTAGE
DRIVER
POR
HDin
LDin
CLK
ZC
OC
DCM
+
BODY
BRAKING
CONTROL
SW
LDrv
PGnd
Vsns
Intl_SS
POR
FAULT
Enable
UVEN
UVcc
RS-
RS+
-
+
DIGITAL
SOFT
START
UVEN
POR
POR
Vp
VREF
FB
PVin
SSOK
CONTROL
LOGIC
ZERO CROSSING
COMPARATOR
OVER CURRENT
OCset
RSo
Rt/Sync
PGD
Figure 3: IR3846 Simplified Block Diagram
3
www.irf.com
© 2014 International Rectifier
Submit Datasheet Feedback
May 29, 2014
IR3846
PIN DESCRIPTIONS
PIN #
1
2, 3, 22, 23, 26
4
5
6
PIN NAME
PVin
NC
Boot
Enable
Rt/Sync
PIN DESCRIPTION
Input voltage for power stage. Bypass capacitors between PVin and
PGND should be connected very close to this pin and PGND; also forms
input to feedforward block
No Connect
Supply voltage for high side driver
Enable pin to turning on and off the IC.
Use an external resistor from this pin to LGND to set the switching
frequency, very close to the pin. This pin can also be used for external
synchronization.
Current limit setpoint. This pin allows the trip point to be set to one of
three possible settings by either floating this pin, tying it to VCC or tying it
to PGnd.
Sense pin for OVP and PGood
Inverting input to the error amplifier. This pin is connected directly to the
output of the regulator or to the output of the remote sense amplifier, via
resistor divider to set the output voltage and provide feedback to the
error amplifier.
Output of error amplifier. An external resistor and capacitor network is
typically connected from this pin to FB to provide loop compensation.
Remote Sense Amplifier Output
Power ground. This pin should be connected to the system’s power
ground plane. Bypass capacitors between PVin and PGND should be
connected very close to PVIN pin (pin 1) and this pin.
Signal ground for internal reference and control circuitry.
Soft start/stop control. A high logic input enables the device to go into the
internal soft start; a low logic input enables the output soft discharged.
Pull this pin high if this function is not used.
Remote Sense Amplifier input. Connect to ground at the load.
Remote Sense Amplifier input. Connect to output at the load.
External reference voltage can be used for margining operation. A
capacitor between 100pF and 180pF should be connected between this
pin and LGnd. Tie to LGnd for tracking function.
Used for voltage sequencing and tracking. Leave open if sequencing or
tracking is not needed, ensuring that there is no capacitor on the pin.
Power Good status pin. Output is open drain. Connect a pull up resistor
from this pin to VCC.
Input Voltage for LDO.
Bias Voltage for IC and driver section, output of LDO. Add a minimum of
4.7uF bypass cap from this pin to PGnd.
Switch node. This pin is connected to the output inductor.
Submit Datasheet Feedback
May 29, 2014
7
8
OCset
Vsns
9
FB
10
11
12, 25
13
14
15
16
17
18
19
20
21
24
4
www.irf.com
COMP
RSo
PGND
LGND
S_Ctrl
RS-
RS+
Vref
Vp
PGD
Vin
VCC/LDO_out
SW
© 2014 International Rectifier
IR3846
ABSOLUTE MAXIMUM RATINGS
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device.
These are stress ratings only and functional operation of the device at these or any other conditions beyond those
indicated in the operational sections of the specifications are not implied.
PVin
Vin
VCC
SW
BOOT
BOOT to SW
Input/Output pins
RS+, RS-, RSo, PGD, Enable, OCset, S_Ctrl
PGND to LGND, RS- to LGND
Junction Temperature Range
Storage Temperature Range
Machine Model
ESD
Human Body Model
Charged Device Model
Moisture Sensitivity level
RoHS Compliant
-0.3V to 25V
-0.3V to 25V
-0.3V to 8V (Note 1)
-0.3V to 25V (DC), -4V to 25V (AC, 100ns)
-0.3V to 33V
-0.3V to VCC + 0.3V (Note 2)
-0.3V to 3.9V
-0.3V to 8V (Note 1)
-0.3V to + 0.3V
-40°C to 150°C
-55°C to 150°C
Class A
Class 1C
Class III
JEDEC Level 3 @ 260°C
Yes
Note:
1. VCC must not exceed 7.5V for Junction Temperature between -10°C and -40°C.
2. Must not exceed 8V.
THERMAL INFORMATION
Thermal Resistance, Junction to Case (θ
JC_TOP
)
Thermal Resistance, Junction to PCB (θ
JB
)
Thermal Resistance, Junction to Ambient (θ
JA
) (Note 3)
30 °C/W
2.71 °C/W
14.3 °C/W
Note:
3. Thermal resistance (θ
JA
) is measured with components mounted on a high effective thermal conductivity
test board in free air.
5
www.irf.com
© 2014 International Rectifier
Submit Datasheet Feedback
May 29, 2014