Supertex inc.
Universal Relay Driver
Features
►
►
►
►
►
►
10 to 450V input voltage range
Energy saving hold current mode
Adjustable microcontroller supply
Low supply current <1.0mA
Constant current coil
Programmable pull-in current, pull-in time,
and hold current
►
Efficient PWM operation using the relay
coils’ inductance
HV9901
General Description
The Supertex
HV9901 is a BiCMOS/DMOS universal relay driver that
employs PWM switching techniques. It is designed for efficient and energy-
saving operation of a low voltage relay with supply voltages ranging from
10 to 450V DC through utilization of the relay coils’ inductance.
The circuit is capable of operating over a wide input voltage range without
requiring a change of any external components. For example, this will
enable users to use 5.0V coil relays for DC voltages 10 to 450V or AC
voltages up to 240V.
The HV9901 has an internal high-voltage regulator to power internal
PWM circuitry. Additionally, it includes an adjustable auxiliary regulator
with a 1.0mA capability that can be used to supply low power micro
controllers.
The pull-in current, pull-in time and hold current are all program-mable
using only two resistors and a capacitor. The PWM switching frequency
can be either:
- Synchronized to an external clock, or
- Synchronized to other HV9901s, where the synchronized
frequency is the highest free-running frequency.
The enable (ENI) logic input is used to turn the relay on/off. Enable
polarity may be selected via the POL input. Audible noise is prevented
using fixed switching frequencies above 20kHz.
WARNING!!! Galvanic isolation is not provided. Dangerous voltages are
present when connected to the AC line. It is the responsibility of the
designer to ensure adequate safeguards are in place to protect the end
user from electrical shock.
Applications
►
►
►
►
Industrial controls
Relay timers
Solenoid drivers
Home automation
Typical Boost Application Circuit
V
IN
VIN
VDD
INT
REG
V
REF
PWM
HV9901
SYNC
GT
CS
RT
SYNC
VREF
H/D
V
CC
VCC
FB
AUX
REG
POL
ENO
ENI
Enable Polarity
Enable
Doc.# DSFP-HV9901
B090513
Supertex inc.
www.supertex.com
HV9901
Ordering Information
Part Number
HV9901NG-G
HV9901NG-G M901
HV9901NG-G M934
Package
16-Lead SOIC (Narrow Body)
16-Lead SOIC (Narrow Body)
16-Lead SOIC (Narrow Body)
Packing
45/Tube
1000/Reel
2500/Reel
GT
CS
COM
SYNC
RT
Pin Configuration
VIN
1
VDD
VREF
HOLD/DELAY
FB
VCC
ENI
ENO
POL
-G denotes a lead (Pb)-free / RoHS compliant package
Absolute Maximum Ratings
Parameter
Input voltage V
IN
1
Input voltage to any other pin
1
Operating temperature range
Continuous Power dissipation (T
A
= +25°C)
2
Note:
1. All voltages are referenced to COM.
2. For operation above 25°C ambient derate linearly at 7.5 mW/°C.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in
the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
Value
-0.5V to +470V
-0.3V to V
DD
+0.3V
-40°C to +85°C
750mW
16-Lead SOIC
(top view)
Product Marking
Top Marking
YWW
HV9901NG
LLLLLLLL
Bottom Marking
CCCCCCCCC AAA
Y = Last Digit of Year Sealed
WW = Week Sealed
L = Lot Number
C = Country of Origin
A = Assembler ID*
= “Green” Packaging
* May be part of top marking
Package may or may not include the following marks: Si or
Typical Thermal Resistance
Package
16-Lead SOIC
θ
ja
83
O
C/W
16-Lead SOIC
Electrical Characteristics
(T
Sym
V
IN
I
IN
Parameter
Input voltage
Supply current
High Voltage Regulator
A
= +25°C unless otherwise noted)
Min
10
-
Typ
-
-
Max
450
2.0
Units
V
mA
Conditions
I
CC
= 0 to 1.0mA load
No load at V
DD
.
load at I
CC
= 1.0mA
C
GT
= 500pF, f
OSC
= 25KHz
No load at V
DD
.
C
GT
= 500pF,
f
OSC
= 25KHz
---
---
V
DD
UV
ON
UV
HYS
*
Internally regulated voltage
V
DD
under voltage lockout, on
V
DD
under voltage lockout, hysteresis
8.5
7.8
-
9.0
8.2
0.5
9.5
8.5
-
V
V
V
Maximum allowable load current limited by power dissipation and operating ambient temperature.
Doc.# DSFP-HV9901
B090513
2
Supertex inc.
www.supertex.com
HV9901
Electrical Characteristics
(T
Sym
V
CC
I
CC
V
FB
I
FB
Reference
Bandgap reference voltage
V
REF
I
REF(SHORT)
I
REF(SINK)
Oscillator
f
OSC
-
f
SYNC
I
SYNC
I
SYNC
V
SYNC
PWM
D
MAX
t
BLNK
V
GTH
V
GTL
t
R
t
F
V
CS(HL)
t
DELAY(HL)
I
CS
V
OS
t
DELAY(LL)
Maximum duty cycle
Blanking time
Gate drive output high
Gate drive output low
Rise time
Fall time
Current sense voltage, high limit
Current limit delay to GT, high limit
Input bias current
Low limit comparator input offset
voltage
Current limit delay to GT, low limit
96.5
86.5
150
V
DD
-0.3
-
-
-
0.775
-
-
-
-
-
-
215
-
-
30
30
0.833
200
25
-
200
99.5
97.5
280
-
0.30
50
50
0.891
250
1000
±60
250
%
%
ns
V
V
ns
ns
V
ns
nA
mV
ns
R
T
= 1.0MΩ
R
T
= 226KΩ
---
I
OUT
= 10mA
I
OUT
= -10mA
C
GT
= 500pF
PWM oscillator frequency
Temperature coefficient
Oscillator sync frequency
Sync input/output sourcing current
Sync input/output sinking current
Sync input logic low voltage
20
80
-
-
20
1.0
-
25
100
170
-
-
-
-
35
140
-
150
55
-
1.0
kHz
kHz
ppm/
O
C
kHz
μA
mA
V
R
T
= 1.0MΩ
R
T
= 226KΩ
T
A
= -40
O
C to +85
O
C
---
---
V
SYNC
= 0.1V
---
Load regulation
Line regulation
Short circuit current
Reference voltage sink current
1.20
-
-
-
-
1.25
-
10
-
-
1.30
7.0
15
1.0
20
V
mV
mV
mA
μA
T
A
= -40°C to +85°C
0mA < I
REF
< 0.3mA
8.5V < V
DD
< 9.5V
---
---
Parameter
Regulator output voltage range
Regulator output current
Feedback voltage
Input bias current
Adjustable Regulator
2.0
0
0
-
-
-
V
REF
25
5.5
1.0
V
DD
-1.0V
100
V
mA
V
nA
I
CC
= 1.0mA load
No load at V
DD
*
---
V
FB
= V
REF
A
= +25°C unless otherwise noted)
Min
Typ
Max
Units
Conditions
MOSFET Driver Output
Current Sensing
---
50mV overdrive
POL = Low, ENI = Low
---
50mV overdrive
Doc.# DSFP-HV9901
B090513
3
Supertex inc.
www.supertex.com
HV9901
Electrical Characteristics
(T
Sym
V
HOLD/DEL
I
HOLD/DEL
t
ENI
V
ENI
I
ENI
V
POL
I
POL
V
ENO
Parameter
Hold/delay output voltage
Hold/delay input bias current
Shutdown delay
Enable input voltage - High
Enable input voltage - Low
Enable input current - High
Enable input current - Low
Polarity voltage - High
Polarity voltage - Low
Polarity current - High
Polarity current - Low
Enable output voltage - High
Enable output voltage - Low
A
= +25°C unless otherwise noted)
Min
V
DD
-0.4
-
-
0.7V
CC
0
-
-5.0
0.7V
CC
0
-
-5.0
0.9V
CC
0
Typ
-
25
50
-
-
1.0
-1.0
-
-
1.0
-1.0
-
-
Max
-
500
100
V
CC
0.3V
CC
5.0
-
V
CC
0.3V
CC
5.0
-
V
CC
0.1V
CC
Units
V
nA
ns
V
V
μA
μA
V
V
μA
μA
V
V
Conditions
I
HOLD/DEL
(sourcing) -100μA
POL = Low, ENI = Low
POL = Low, ENI = Low
2.0V < V
CC
< 5.5V
Enable Logic Truth Table
POL
Low
Low
High
High
ENI
Low
High
High
Low
ENO
High
Low
Low
High
Gate Drive Output
V
GT
= Oscillating output, duty cycle depends on inductive load
V
GT
= Low, SYNC = High, oscillator shut down.
V
GT
= Oscillating output, duty cycle depends on inductive load
V
GT
= Low, SYNC = High, oscillator shut down.
Application Information
I
PULL-IN
=
V
CS
R
SENSE
I
CS(HI)
= 833mV nom
V
DD
= 9.0V nom
t
PULL-IN
V
DD
V
CS(LL)
=
R
HDa
1 +
R
HDb
I
HOLD
=
V
CS(LL)
R
SENSE
I
PULL-IN
t
PULL-IN
= -(R
HDa
R
HDb
) C
HD
ln 1 -
f
PWM
≈ 3.23kHz +
V
CS(HL)
- V
DD
V
CS(LL)
- V
DD
Current
I
HOLD
21.8GHz • Ω
(valid for f
PWM
> 23kHz)
R
OSC
R
FBa
V
CC
= 1.25V 1 +
R
FBb
Time
Figure 1
Doc.# DSFP-HV9901
B090513
4
Supertex inc.
www.supertex.com
HV9901
Application Information
(cont.)
V
IN
VIN
VDD
C
DD
VREF
R
HDa
C
REF
H/D
R
HDb
C
HD
R
OSC
C
IN
Int
Reg
V
REF
HV9901
SYNC
GT
Q
SW
PWM
CS
R
SENSE
RT
2.0–5.5V
@ 1.0mA
VCC
R
FBa
FB
R
FBb
Aux
Reg
POL
ENO
ENI
Figure 2
Pin Description
Pin #
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Name
VIN
-
-
GT
CS
COM
SYNC
RT
POL
ENO
ENI
VCC
FB
H/D
VREF
VDD
Description
Input supply.
Pin not present
Pin not present
Gate driver output for driving the external switching MOSFET.
Current sense input.
Common. Connect to circuit ground.
Open-drain input/output for synchronizing the internal PWM oscillator to other HV9901s or to an
external clock.
A resistor from this pin to ground sets the PWM switching frequency.
Input that determines the polarity of the ENI input. See the truth table.
Enable out. It is the logical inversion of the ENI signal.
Enabled input. Whether ENI is active low or active high is determined by the POL input.
Output of the internal auxiliary regulator. Output voltage is determined by the resistive divider con-
nected to the FB pin.
Feedback input for the auxiliary regulator.
HOLD/DELAY input. An RC network connected to this pin controls the pull-in time and the holding
current. See the equations on page 4.
Internal reference voltage. Bypass locally with a 10nF capacitor.
Output of the internal regulator. Bypass locally with a 10nF capacitor.
Doc.# DSFP-HV9901
B090513
5
Supertex inc.
www.supertex.com
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