Dual DVB-T2/T/C Digital TV Demodulator
Description
The Si21682 integrates two separate high performance
DVB-T2, DVB-T, and DVB-C digital demodulators into a single
compact package for terrestrial and cable TV standards.
Leveraging Silicon Labs' proven digital demodulation
architecture, each embedded demodulator achieves excellent
reception performance for each media, while significantly
minimizing front-end design complexity and cost. Connecting
the Si21682 to a dual terrestrial/cable TV tuner results in a
high-performance and cost optimized TV front-end solution.
Silicon Labs’ internally-developed DVB-T2 (including T2-Lite)
demodulators support all modes specified by the DVB-T2
standard (V1.3.1). Main features of the DVB-T2 mode are,
SISO and MISO support, FEF management, fully
autonomous signal acquisition including automatic L1
signaling parsing support for all pilot patterns, and DVB-T2/T
auto-detection. The DVB-T and DVB-C demodulators are
enhanced versions of proven and broadly used Si2167/68/69
Silicon Labs devices.
The Si21682 offers an on-chip blind scanning algorithm for
the DVB-C standard (as well as blind lock).
The Si21682 embeds two independent programmable
transport stream interfaces which provide a flexible range of
output modes and are fully compatible with all MPEG
decoders or conditional access modules to support any
customer application.
Si21682
Features
-
DVB-T2 and T2-Lite (ETSI EN 302 755-V1.3.1)
-
Bandwidth: 1.7, 5, 6, 7 or 8 MHz (and extended BW)
-
Supports up to 255 PLP(s) and outputs the data PLP
plus the common PLP (on a single TS)
-
Scrambling of L1 post-signaling supported
-
NorDig Unified 2.4, D-Book 7 V2 compliant
DVB-T (ETSI EN 300 744)
-
NorDig Unified 2.4, D-Book 7 V2 compliant
DVB-C (ETSI EN 300 429) / ITU J.83 Annex A/B/C
-
1 to 7.2 MSymbol/s
-
C-Book compliant
2
C serial bus interfaces (master and host)
I
Dual independent differential IF input for T/C tuners
GPIOs and multi-purpose ports (two per demodulator)
Firmware control for upgradeability
Separate flexible TS interfaces with serial or parallel
outputs
Fast lock times for all standards, including DVB-T2
Only two power supplies: 1.2 and 3.3 V
8x8 mm, QFN-68 pin package, Pb-free/RoHS compliant
Pin-to-pin and API compatible with all dual demodulator
family: Si216x2
Multi-receiver iDTV: on-board or in a NIM
Advanced multimedia PVR STBs
PC-TV accessories
PVR, DVD, and Blu-Ray disc recorders
1.2, 3.3V
RESETB
-
-
-
-
-
-
-
-
-
-
-
Applications
-
-
-
-
MP_A_A
MP_C_A
Si21682
GPIO1/TS_ERR_A
TS_VAL_A
ADC_A
DEMODULATOR_A CORE
TS_SYNC_A
TS_CLK_A
TS_DATA_A
ADDR_A
8
TV Tuner
TC_ADC_P_A
TC_ADC_N_A
I2C Block_A
SDA_MAST
SCL_MAST
XO
XTAL_I/CLK_IN
CLK_IN/OUT
SDA_HOST
SCL_HOST
I2C Block_B
ADDR_B
GPIO0/TS_ERR_B
TV Tuner
TC_ADC_P_B
TC_ADC_N_B
ADC_B
TS_VAL_B
DEMODULATOR_B CORE
TS_SYNC_B
TS_CLK_B
TS_DATA_B
8
MP_B_B
MP_D_B
Dual Digital Demodulators
Copyright © 2013 by Silicon Laboratories
8.20.2013
HDTV MPEG S.o.C.
Dual DVB-T2/T/C Digital TV Demodulator
Selected Electrical Specifications
(T
A
= –10 to 70 °C)
.
Parameter
General
Input clock reference
Supported XTAL frequency
Total power consumption for
each demodulator
Thermal resistance (
JA
)
Power Supplies
V
DD
_
VCORE
V
DD
_
VANA
V
DD
_
VIO
Si21682
Test Condition
Min
4
16
—
—
—
1.14
3.00
3.00
Typ
—
—
420
190/180
42
1.20
3.30
3.30
Max
30
30
—
—
—
1.30
3.60
3.60
Unit
MHz
MHz
mW
mW
°C/W
V
V
V
DVB-T2
1
DVB-T
2
/DVB-C
3
4 layer PCB
Notes:
1.
Test conditions: 8 MHz, 256 QAM, 32K FFT, CR=3/5, GI=1/128, PP7, C/N at picture failure.
2.
Test conditions: 8 MHz, IF mode, 8K FFT, 64 QAM, parallel TS output.
3.
Test conditions: 6.9 MBaud, IF mode, 256 QAM, parallel TS output.
Pin Assignments
GPIO_1/TS_ERR_A
XTAL_I/CLK_IN
TS_DATA[7]_B
TS_DATA[7]_A
TS_DATA[6]_B
TS_DATA[6]_A
TS_SYNC_A
TS_DATA[5]_B
VDD_CORE
VDD_CORE
VDD_ANA
ADDR_B
ADDR_A
MP_D_B
MP_C_A
RESETB
NC
51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35
NC
52
NC
53
NC
54
NC
55
NC
56
NC
57
NC
58
TC_ADC_P_A
59
TC_ADC_N_A
60
TC_ADC_P_B
61
TC_ADC_N_B
62
CLK_IN_OUT
63
SDA_MAST
64
SCL_MAST
65
GND
66
VDD_CORE
67
VDD_CORE
68
XO
34
TS_DATA[5]_A
33
VDD_VIO
32
GND
31
VDD_CORE
30
VDD_CORE
Si21682
(GND_PAD)
29
TS_DATA[4]_B
28
TS_DATA[4]_A
27
TS_DATA[3]_B
26
TS_DATA[3]_A
25
TS_DATA[2]_B
24
TS_DATA[2]_A
23
TS_DATA[1]_B
22
TS_DATA[1]_A
21
TS_DATA[0]_B/TS_SER_B
20
TS_DATA[0]_A/TS_SER_A
19
TS_CLK_B
18
TS_CLK_A
QFN-68
8x8mm
1
MP_A_A
2
MP_B_B
3
GPIO_0/TS_ERR_B
4
NC
5
RSVD
6
NC
7
NC
8
VDD_CORE
9 10 11 12 13 14 15 16 17
VDD_CORE
VDD_VIO
SDA_HOST
SCL_HOST
TS_SYNC_B
TS_VAL_A
TS_VAL_B
GND
Selection Guide
Part #
Si21682-B40-GM/R
Dual Digital Demodulators
Description
Dual Digital TV Demodulator for DVB-T2/T/C, 8x8 mm QFN-68
Copyright © 2013 by Silicon Laboratories
8.20.2013
Silicon Laboratories and Silicon Labs are trademarks of Silicon Laboratories Inc.
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