LTC1329-10/
LTC1329-50/LTC1329A-50
Micropower 8-Bit Current
Output D/A Converter
FEATURES
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DESCRIPTION
The LTC
®
1329-10/LTC1329-50/LTC1329A-50 are
micropower 8-bit current output D/A converters (DACs)
with an output range of 0µA to 10µA for the LTC1329-10
and 0µA to 50µA for the LTC1329-50/LTC1329A-50. The
DAC current output can be biased from – 15V to 2V or
– 15V to 2.5V in 3.3V and 5V systems, respectively. Supply
current is only 95µA for the LTC1329-50/LTC1329A-50
and 75µA for LTC1329-10. A shutdown mode drops the
supply current to 0.2µA.
The LTC1329 can communicate with external circuitry by
using one of three interface modes: standard 3-wire serial
mode and two pulse modes. Upon power-up, the internal
counter resets to 1000 0000B, the DAC output assumes
midrange and the chip is configured in 3-wire or pulse
mode depending on the signal level at CS.
In 3-wire mode, the system MPU can serially transfer 8-bit
data to and from the LTC1329. In pulse mode, the upper
six bits of the DAC output can be programmed for incre-
ment-only (1-wire interface) or increment/decrement
(2-wire interface) operation depending on the signal level
at D
IN
.
LTC1329 is available in 8-pin SO packages.
, LTC and LT are registered trademarks of Linear Technology Corporation.
Triple Mode is a trademark of Linear Technology Corporation.
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Guaranteed Precision Full-Scale DAC Output
Current at 25
°
C:
LTC1329A-50
50µA
±1%
LTC1329-10
10µA
±3%
LTC1329-50
50µA
±3%
Wide Output Voltage DC Compliance: – 15V to 2.5V
Wide Supply Range: 2.7V
≤
V
CC
≤
6.5V
Supply Current in Shutdown: 0.2µA
Low Supply Current: 75µA for LTC1329-10,
95µA for LTC1329-50/LTC1329A-50
Available in 8-Pin SO
Triple Mode
TM
Interface Modes
1. Standard 3-Wire Mode
2. Pulse Mode 1-Wire Interface: Increment-Only
3. Pulse Mode 2-Wire Interface: Increment/Decrement
Can Read Back the 8-Bit DAC Value in 3-Wire Mode
DAC Powers Up at Midrange
DAC Contents Are Retained in Shutdown
APPLICATIONS
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LCD Contrast Control
Backlight Brightness Control
Battery Charger Current/Voltage Adjustment
Power Supply Voltage Adjustment
Trimmer Pot Elimination
TYPICAL APPLICATION
Digitally Controlled LCD Bias Generator
V
IN
5V
47Ω
V
IN
SW1
®
LT 1173
FB
GND
SW2
1N5818
I
LIM
L1*
100µH
1N4148
200k
0.1µF
1
2
I
OUT
V
CC
D
OUT
D
IN
8
7
MPU
(e.g., 8051)
+
47µF
+
4.7µF
10.1k
1N5818
LTC1329-50
3
4
SHDN
CLK
GND
CS
6
5
+
22µF
*GOWANDA GA10-103K OR
COILTRONICS CTX100-4
220k
V
OUT
–22V at 40mA
1329 TA01
U
U
U
P1.2
P1.1
P1.0
1
LTC1329-10/
LTC1329-50/LTC1329A-50
ABSOLUTE
MAXIMUM
RATINGS
(Note 1)
PACKAGE/ORDER INFORMATION
TOP VIEW
I
OUT
1
V
CC
2
SHDN 3
CLK 4
8 D
OUT
7 D
IN
(UP/DN)
6 GND
5 CS
Supply Voltage (V
CC
) ................................................ 7V
Input Voltage (All Inputs)............ – 0.3V to (V
CC
+ 0.3V)
Output Voltage
I
OUT
......................................... – 15V to (V
CC
+ 0.3V)
D
OUT
....................................... – 0.3V to (V
CC
+ 0.3V)
Short-Circuit Duration (All Outputs) ............... Indefinite
Operating Temperature Range .................... 0°C to 70°C
Storage Temperature Range ................. – 65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
ORDER PART
NUMBER
LTC1329CS8-10
LTC1329CS8-50
LTC1329ACS8-50
S8 PART MARKING
13291
1329A5
13295
S8 PACKAGE
8-LEAD PLASTIC SO
T
JMAX
= 125°C,
θ
JA
= 150°C/ W
Consult factory for Industrial and Military grade parts.
ELECTRICAL CHARACTERISTICS
SYMBOL PARAMETER
V
CC
I
CC
Supply Current
CONDITIONS
V
CC
= 3.3V, T
A
= 25°C, unless otherwise specified.
LTC1329-10
MIN TYP
MAX
2.7
6.5
75
130
0.2
8
10
10
5
10.3
10.5
48.5
47.5
49.5
49.0
LTC1329-50/LTC1329A-50
MIN
TYP
MAX
2.7
6.5
95
150
0.2
8
50
50
50
50
5
51.5
52.5
50.5
51.0
200
±0.9
±2
±4
±0.25
±1.5
±1
2.0
1.9
0.80
0.45
2.4
2.1
0.4
0.4
±5
2.4
2.1
0.4
0.4
±5
0.80
0.45
UNITS
V
µA
µA
Bits
µA
µA
µA
µA
nA
LSB
LSB
LSB
LSB
LSB
µA
V
V
V
V
V
V
V
V
µA
q
V
SHDN
= V
DIN
= V
CS
= V
CC
, V
CLK
= 0V,
D
OUT
= NC, I
OUT
= NC
Shutdown
Output Voltage at I
OUT
= 0.45V, T
A
= 25°C
(LTC1329-10, LTC1329-50)
Output Voltage at I
OUT
= 0.45V, T
A
= 25°C
(LTC1329A-50)
Output Voltage at I
OUT
= 0.45V
Monotonicity Guaranteed
q
q
DAC Resolution
DAC Full-Scale Current
q
q
q
q
q
q
q
q
q
q
q
q
q
q
q
q
q
q
9.7
9.5
I
IH
, I
IL
V
IH
V
IL
V
OH
V
OL
I
OZ
V
CC
= 3V to 5.5V, I
OUT
= Full Scale,
Output Voltage at I
OUT
= 0.45V
V
CC
= 2.7V to 6.5V, Full Scale,
Output Voltage at I
OUT
= 0.45V
Output Voltage Rejection
V
CC
= 5V, I
OUT
= Full Scale,
Output Voltage at I
OUT
= – 15V to 0V
V
CC
= 5V, I
OUT
= Full Scale,
Output Voltage at I
OUT
= 0V to 2.5V
Logic Input Current
0V
≤
V
IN
≤
V
CC
High Level Input Voltage
V
CC
= 5V
V
CC
= 3.3V
Low Level Input Voltage
V
CC
= 5V
V
CC
= 3.3V
High Level Output Voltage
V
CC
= 5V, I
O
= 400µA
V
CC
= 3.3V, I
O
= 400µA
Low Level Output Voltage
V
CC
= 5V, I
O
= 2mA
V
CC
= 3.3V, I
O
= 1mA
Three-State Output Leakage V
CS
= V
CC
DAC Zero-Scale Current
DAC Differential
Nonlinearity
Supply Voltage Rejection
±0.3
±1
±2.5
±0.25
200
±0.9
±2
±4
±1
±1.5
±1
±1
±2.5
2.0
1.9
2
U
W
U
U
W W
W
LTC1329-10/
LTC1329-50/LTC1329A-50
RECO
f
CLK
t
CKS
t
CSS
t
DV
t
DS
t
DH
t
DO
t
CKHI
t
CKLO
t
CSH
t
DZ
t
CKH
t
CSLO
t
CSHI
E DED OPERATI G CO DITIO S
CONDITIONS
SYMBOL PARAMETER
Serial Interface
Clock Frequency
Setup Time, CLK↓ Before CS↓
Setup Time, CS↓ Before CLK↑
CS↓ to D
OUT
Valid
D
IN
Setup Time Before CLK↑
D
IN
Hold Time After CLK↑
CLK↓ to D
OUT
Valid
CLK High Time
CLK Low Time
CLK↓ Before CS↑
CS↑ to D
OUT
in Hi-Z
CS↑ Before CLK↑
CS Low Time
CS High Time
See Test Circuits
See Test Circuits
See Test Circuits
f
CLK
= 2MHz (Note 4)
V
CLK
= 0V
The
q
denotes specifications which apply over the full operating
temperature range.
Note 1:
Absolute Maximum Ratings are those values beyond which the life
of the device may be impaired.
Note 2:
Timing for all input signals is measured at 0.8V for a High-to-Low
transition and at 2V for a Low-to-High transition.
Note 3:
Timing specification are guaranteed but not tested.
Note 4:
This is the minimum time required for valid data transfer.
TYPICAL PERFORMANCE CHARACTERISTICS
LTC1329-10 DNL vs Code
1.0
0.8
0.6
0.4
DNL (LSB)
LTC1329-10 INL vs Code
1.0
T
A
= 25°C
V
CC
= 3.3V
V(I
OUT
) = 0.45V
0.8
0.6
0.4
T
A
= 25°C
V
CC
= 3.3V
V(I
OUT
) = 0.45V
INL (LSB)
0.2
0
–0.2
–0.4
–0.6
–0.8
–1.0
0
32
64
96 128 160 192 224 256
CODE
1392 G01
0.2
0
–0.2
–0.4
–0.6
–0.8
–1.0
0
32
64
96 128 160 192 224 256
CODE
1329 • TPC02
DNL (LSB)
U
U
U
U W
U WW
V
CC
= 3.3V, unless otherwise specified. (Notes 2, 3)
MIN
q
q
q
q
q
q
q
q
q
q
q
q
q
q
q
TYP
MAX
2
UNITS
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
150
400
150
150
150
150
200
250
150
400
400
4550
400
400
ns
ns
ns
ns
ns
LTC1329-50 DNL vs Code
1.0
0.8
0.6
0.4
0.2
0
–0.2
–0.4
–0.6
–0.8
–1.0
0
32
64
96 128 160 192 224 256
CODE
1392 G03
T
A
= 25°C
V
CC
= 3.3V
V(I
OUT
) = 0.45V
3
LTC1329-10/
LTC1329-50/LTC1329A-50
TYPICAL PERFORMANCE CHARACTERISTICS
LTC1329-50 INL vs Code
1.0
0.8
0.6
0.4
INL (LSB)
FULL-SCALE I
OUT
ERROR (LSB)
FULL-SCALE I
OUT
ERROR (LSB)
T
A
= 25°C
V
CC
= 3.3V
V(I
OUT
) = 0.45V
0.2
0
–0.2
–0.4
–0.6
–0.8
–1.0
0
32
64
96 128 160 192 224 256
CODE
1329 • TPC04
LTC1329-10/LTC1329-50
Bias Voltage Rejection
(Full-Scale Current)
0.5
0.4
FULL-SCALE I
OUT
ERROR (LSB)
ZERO-SCALE I
OUT
CURRENT (nA)
MAXIMUM I
OUT
BIAS VOLTAGE (V)
T
A
= 25°C
V
CC
= 3.3V
0.3
0.2
0.1
0
–0.1
–0.2
–0.3
–0.4
–0.5
–15 –12
–6 –3
0
–9
I
OUT
BIAS VOLTAGE (V)
3
6
LTC1329-10
LTC1329-50
PIN FUNCTIONS
I
OUT
(Pin 1):
DAC Current Output. In 3.3V or 5V systems,
the DAC current output can be biased from – 15V to 2V or
– 15V to 2.5V respectively.
V
CC
(Pin 2):
Voltage Supply (2.7V
≤
V
CC
≤
6.5V). This
supply must be kept free from noise and ripple by bypass-
ing directly to the ground plane.
SHDN (Pin 3):
Shutdown. A logic low puts the chip
into Shutdown mode. The digital setting for the DAC is
retained.
CLK (Pin 4):
Shift Clock. This clock synchronizes the serial
data in 3-wire mode. This pin has a Schmitt trigger input.
CS (Pin 5):
Chip Select Input. In 3-wire mode, a logic low
on this CS pin enables the LTC1329. Upon power-up, a
logic high at CS puts the chip into pulse mode. If CS ever
goes low, the chip is configured in 3-wire mode until the
next power is cycled.
GND (Pin 6):
Ground. Ground should be tied directly to a
ground plane.
D
IN
(UP/DN)(Pin 7):
Data Input. In 3-wire mode, the DAC
data is shifted into D
IN
on the rising edge of CLK. In pulse
mode, upon power-up a logic high at D
IN
puts the counter
into increment-only mode. If D
IN
ever goes low, the
4
U W
1329 G07
LTC1329-10/LTC1329-50 Full-
Scale Current vs Temperature
3
2
1
0
–1
LTC1329-10
–2
–3
V
CC
= 3.3V
V(I
OUT
) = 0.45V
2
LTC1329-10/LTC1329-50
Supply Voltage Rejection
T
A
= 25°C
V(I
OUT
) = 0.45V
1
LTC1329-50
LTC1329-50
0
LTC1329-10
–1
0
10
40
30
50
20
TEMPERATURE (°C)
60
70
–2
0
1
4
3
5
2
SUPPLY VOLTAGE (V)
6
7
1329 G05
1329 G06
LTC1329-10/LTC1329-50
Bias Voltage Rejection
(Zero-Scale Current)
50
40
30
20
10
0
–10
–20
–30
–40
–50
–15 –12
–6 –3
0
–9
I
OUT
BIAS VOLTAGE (V)
3
6
LTC1329-10
LTC1329-50
6.5
6.0
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
Maximum I
OUT
Bias Voltage
vs Supply Voltage
T
A
= 25°C
I
OUT
= FULL-SCALE CURRENT
2.7 3.2
3.7 4.2 4.7 5.2 5.7
SUPPLY VOLTAGE (V)
6.2
6.7
1329 G08
1329 • TPC09
U
U
U
LTC1329-10/
LTC1329-50/LTC1329A-50
PIN FUNCTIONS
counter is configured in increment/decrement mode until
the power is cycled.
D
OUT
(Pin 8):
Data Output. In 3-wire mode, on every
conversion D
OUT
serially outputs the previous 8-bit DAC
data. In pulse mode, D
OUT
is three-stated.
BLOCK DIAGRA
POWER-ON
RESET
CLK
D
IN
(UP/DN)
CS
SHDN
CONTROL
LOGIC
TEST CIRCUITS
Voltage Waveforms for t
DO
CLK
0.8V
t
DO
D
OUT
2.4V
0.4V
1329 TC03
Load Circuit for t
DO
1.4V
3k
D
OUT
100pF
1329 TC01
W
U
U
U
LATCH
AND
LOGIC
UP ONLY/
UP/DN
VOLTAGE
REFERENCE
SHDN
V
CC
LATCH
AND
LOGIC
MODE SELECT
0 = PULSE
1 = 3-WIRE
SHDN
8-BIT
CURRENT
DAC
I
OUT
8
CLK
8-BIT DAC REGISTER/COUNTER
UP/DN
8
8
CLK
9-BIT SHIFT REGISTER
D
IN
D
OUT
D
OUT
1329 BD
Voltage Waveforms for t
DZ
, t
DV
CS
2.0V
0.8V
2.4V
D
OUT
HI-Z
SET HIGH
D
OUT
HI-Z
SET LOW
t
DV
0.4V
t
DZ
90%
HI-Z
HI-Z
10%
1329 TC04
Load Circuit for t
DZ,
t
DV
3k
D
OUT
100pF
5V t
DZ
WAVEFORM 2, t
DV
t
DZ
WAVEFORM 1
1329 TC02
5
51单片机
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