replacing solutions requiring multiple oscillator and fanout buffer
solutions. The device supports 1% downspread spread spectrum
clocking. The ICS840304I has excellent phase jitter (<1ps rms)
over integration range of 1.5MHz - 22MHz. Designed for
Backplane, networ king and industrial applications, the
ICS840304I can also drive the high-speed PCI-X and PCI-e
SerDes clock inputs of communication processors, DSPs,
switches and bridges.
F
EATURES
• Four LVCMOS/LVTTL outputs,
20Ω typical output impedance
One REF_OUT LVCMOS/LVTTL clock output
• Selectable crystal oscillator interface, 25MHz,
18pF parallel resonant crystal or
LVCMOS/LVTTL single-ended clock input
• Support the following output frequencies: 33.33MHz,
66.67MHz, 100MHz or 133.33MHz
• VCO: 400MHz
• PLL and N divider bypass and output enable
• RMS phase jitter @100MHz, using a 25MHz crystal,
(1.5MHz - 22MHz): 0.46ps (typical) @ 3.3V
• Supports SSC, 1% downspread
• Full 3.3V and 2.5V supply modes
• -40°C to 85°C ambient operating temperature
• Available in both standard (RoHS 5) and lead-free (RoHS 6)
packages
B
LOCK
D
IAGRAM
BYPASS
Pulldown
Q0
P
IN
A
SSIGNMENT
V
DD
XTAL_IN
XTAL_OUT
GND
REF_SEL
REF_IN
BYPASS
nc
V
DDA
F_SEL0
V
DD
F_SEL1
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
V
DDO
_
REF
REF_OUT
GND_REF
nOE
Q0
Q1
GND_Q
Q2
Q3
V
DDO
_
Q
nREF_OE
SSC
1
XTAL_IN
Q1
OSC
XTAL_OUT
REF_IN
Pulldown
0
FemtoClock
PLL
VCO = 400MHz
÷N
0
Q2
1
Q3
REF_SEL
Pulldown
M = ÷16
ICS840304I
24-Lead, 173-MIL TSSOP
4.4mm x 7.8mm x 0.92mm
body package
G Package
Top View
REF_OUT
SSC
Pulldown
nOE
Pulldown
F_SEL[1:0]
nREF_OE
Pulldown
Pullup
2
The Preliminary Information presented herein represents a product in pre-production. The noted characteristics are based on initial product characterization
and/or qualification. Integrated Device Technology, Incorporated (IDT) reserves the right to change any circuitry or specifications without notice.
IDT
™
/ ICS
™
LVCMOS/LVTTL FREQUENCY SYNTHESIZER
1
ICS840304BGI REV A DECEMBER 4, 2006
ICS840304I
FEMTOCLOCKS™ CRYSTAL-TO-LVCMOS/LVTTL FREQUENCY SYNTHESIZER
PRELIMINARY
T
ABLE
1. P
IN
D
ESCRIPTIONS
Number
1, 11
2,
3
4
5
6
7
8
9
10,
12
13
14
15
16, 17,
19 , 2 0
18
21
22
23
24
Name
V
DD
XTAL_IN,
XTAL_OUT
GND
REF_SEL
REF_IN
BYPASS
nc
V
DDA
F_SEL0,
F_SEL1
SSC
nREF_OE
V
DDO_Q
Q3, Q2,
Q1, Q0
GND_Q
nOE
GND_REF
REF_OUT
V
DDO_REF
Power
Input
Power
Input
Input
Input
Unused
Power
Input
Input
Input
Power
Output
Power
Input
Power
Output
Power
Type
Description
Core supply pins.
Crystal oscillator interface. XTAL_OUT is the output.
XTAL_IN is the input.
Power supply ground.
Reference select pin. When HIGH selects REF_IN. When LOW,
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