FEMTOCLOCKS™ CRYSTAL-TO-LVDS
FREQUENCY SYNTHESIZER W/INTEGRATED FANOUT BUFFER
ICS844256
G
ENERAL
D
ESCRIPTION
The ICS844256 is a Cr ystal-to-LVDS Clock
Synthesizer/Fanout Buffer designed for SONET
HiPerClockS™
and Gigabit Ether net applications and is a
member of the HiperClock S family of High
™
Perfor mance Clock Solutions from IDT. The
output frequency can be set using the frequency select
pins and a 25MHz crystal for Ethernet frequencies, or a
19.44MHz crystal for SONET. The low phase noise character-
istics of the ICS844256 make it an ideal clock for these
demanding applications.
F
EATURES
•
Six LVDS outputs
•
Crystal oscillator interface
•
Output frequency range: 62.5MHz to 622.08MHz
•
Crystal input frequency range: 15.625MHz to 25.5MHz
•
RMS phase jitter at 125MHz, using a 25MHz crystal
(1.875MHz to 20MHz): 0.48ps (typical)
•
Full 3.3V or 3.3V core, 2.5V output supply mode
•
0°C to 70°C ambient operating temperature
•
Available in both standard (RoHS 5) and lead-free (RoHS 6)
packages
Function
IC
S
S
ELECT
F
UNCTION
T
ABLE
Inputs
FB_SEL
0
0
0
0
1
1
1
1
N_SEL1
0
0
1
1
0
0
1
1
N_SEL0
0
1
0
1
0
1
0
1
M Divide
25
25
25
25
32
32
32
32
N Divide
1
2
4
5
1
2
4
8
M/N
25
12.5
6.25
5
32
16
8
4
B
LOCK
D
IAGRAM
Q0
nQ0
PLL_BYPASS
Pullup
P
IN
A
SSIGNMENT
V
DDO
V
DDO
nQ2
Q2
nQ1
Q1
nQ0
Q0
PLL_BYPASS
V
DDA
V
DD
FB_SEL
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
Q3
nQ3
Q4
nQ4
Q5
nQ5
N_SEL1
GND
GND
N_SEL0
XTAL_OUT
XTAL_IN
Q1
1
XTAL_IN
OSC
XTAL_OUT
PLL
0
Output
Divider
nQ1
Q2
nQ2
Q3
Feedback
Divider
FB_SEL
N_SEL1
N_SEL0
Pulldown
Pullup
Pullup
ICS844256
24-Lead TSSOP, E-Pad
4.40mm x 7.8mm x 0.90mm
body package
G Package
Top View
nQ3
Q4
nQ4
Q5
nQ5
IDT
™
/ ICS
™
LVDS FREQUENCY SYNTHESIZER W/FANOUT BUFFER
1
ICS844256BG REV. A NOVEMBER 7, 2008
ICS844256
FEMTOCLOCKS™ CRYSTAL-TO-LVDS FREQUENCY SYNTHESIZER W/INTEGRATED FANOUT BUFFER
T
ABLE
1. P
IN
D
ESCRIPTIONS
Number
1, 2
3, 4
5, 6
7, 8
9
10
11
12
13,
14
15,
18
16, 17
19, 20
21, 22
23, 24
Name
V
DDO
nQ2, Q2
nQ1, Q1
nQ0, Q0
PLL_BYPASS
V
DDA
V
DD
FB_SEL
XTAL_IN,
XTAL_OUT
N_SEL0
N_SEL1
GND
nQ5, Q5
nQ4, Q4
nQ3, Q3
Power
Output
Output
Output
Input
Power
Power
Input
Input
Input
Pullup
Type
Description
Output supply pins.
Differential output pair. LVDS interface levels.
Differential output pair. LVDS interface levels.
Differential output pair. LVDS interface levels.
Selects between the PLL and crystal inputs as the input to the dividers.
When LOW, selects PLL. When HIGH, selects XTAL_IN, XTAL_OUT.
LVCMOS / LVTTL interface levels.
Analog supply pin.
Core supply pin.
Pulldown Feedback frequency select pin. LVCMOS/LVTTL interface levels.
Crystal oscillator interface. XTAL_IN is the input.
XTAL_OUT is the output.
Pullup
Output frequency select pin. LVCMOS/LVTTL interface levels.
Power supply ground.
Output
Output
Output
Differential output pair. LVDS interface levels.
Differential output pair. LVDS interface levels.
Differential output pair. LVDS interface levels.
NOTE:
Pullup
and
Pulldown
refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
T
ABLE
2. P
IN
C
HARACTERISTICS
Symbol
C
IN
R
PULLUP
R
PULLDOWN
Parameter
Input Capacitance
Input Pullup Resistor
Input Pulldown Resistor
Test Conditions
Minimum
Typical
4
51
51
Maximum
Units
pF
kΩ
kΩ
IDT
™
/ ICS
™
LVDS FREQUENCY SYNTHESIZER W/FANOUT BUFFER
2
ICS844256BG REV. A NOVEMBER 7, 2008
ICS844256
FEMTOCLOCKS™ CRYSTAL-TO-LVDS FREQUENCY SYNTHESIZER W/INTEGRATED FANOUT BUFFER
C
RYSTAL
F
UNCTION
T
ABLE
Inputs
XTAL (MHz)
20
20
20
20
21.25
24
24
24
24
25
25
25
25
25.5
15.625
18.5625
18.75
18.75
18.75
18.75
19.44
19.44
19.44
19.44
19.53125
19.53125
19.53125
19.53125
20
FB_SEL
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
N_SEL1
0
0
1
1
1
0
0
1
1
0
0
1
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
1
N_SEL0
0
1
0
1
1
0
1
0
1
0
1
0
1
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
1
M
25
25
25
25
25
25
25
25
25
25
25
25
25
25
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
500
500
500
500
531.25
600
600
60 0
60 0
625
625
625
625
637.5
500
594
600
600
600
600
622.08
622.08
622.08
622.08
62 5
625
625
62 5
640
Function
VCO (MHz)
N
1
2
4
5
5
1
2
4
5
1
2
4
5
4
8
8
1
2
4
8
1
2
4
8
1
2
4
8
8
Output (MHz)
500
250
125
100
106.25
600
300
150
120
625
312.5
156.25
125
159.375
62.5
74.25
600
300
150
75
622.08
311.04
155.52
77.76
625
312.5
156.25
78.125
80
IDT
™
/ ICS
™
LVDS FREQUENCY SYNTHESIZER W/FANOUT BUFFER
3
ICS844256BG REV. A NOVEMBER 7, 2008
ICS844256
FEMTOCLOCKS™ CRYSTAL-TO-LVDS FREQUENCY SYNTHESIZER W/INTEGRATED FANOUT BUFFER
A
BSOLUTE
M
AXIMUM
R
ATINGS
Supply Voltage, V
DD
Inputs, V
I
Outputs, I
O
Continuous Current
Surge Current
4.6V
-0.5V to V
DD
+ 0.5V
10mA
15mA
NOTE: Stresses beyond those listed under Absolute
Maximum Ratings may cause permanent damage to the
device. These ratings are stress specifications only. Functional op-
eration of product at these conditions or any conditions beyond
those listed in the
DC Characteristics
or
AC Characteristics
is not
implied. Exposure to absolute maximum rating conditions for ex-
tended periods may affect product reliability.
Package Thermal Impedance,
θ
JA
24 Lead TSSOP, EPad
32.1°C/W (0 mps)
Storage Temperature, T
STG
-65°C to 150°C
T
ABLE
4A. P
OWER
S
UPPLY
DC C
HARACTERISTICS
,
V
DD
= V
DDO
= 3.3V±5%, T
A
= 0°C
TO
70°C
Symbol
V
DD
V
DDA
V
DDO
I
DD
I
DDA
I
DDO
Parameter
Core Supply Voltage
Analog Supply Voltage
Output Supply Voltage
Power Supply Current
Analog Supply Current
Output Supply Current
Test Conditions
Minimum
3.135
V
DD
– 0.20
3.135
Typical
3.3
3.3
3.3
Maximum
3.465
V
DD
3.465
160
20
160
Units
V
V
V
mA
mA
mA
T
ABLE
4B. P
OWER
S
UPPLY
DC C
HARACTERISTICS
,
V
DD
= 3.3V±5%, V
DDO
= 2.5V±5%, T
A
= 0°C
TO
70°C
Symbol
V
DD
V
DDA
V
DDO
I
DD
I
DDA
I
DDO
Parameter
Core Supply Voltage
Analog Supply Voltage
Output Supply Voltage
Power Supply Current
Analog Supply Current
Output Supply Current
Test Conditions
Minimum
3.135
V
DD
– 0.20
2.375
Typical
3. 3
3.3
2.5
Maximum
3.465
V
DD
2.625
160
20
150
Units
V
V
V
mA
mA
mA
T
ABLE
4C. LVCMOS / LVTTL DC C
HARACTERISTICS
,
V
DD
= 3.3V±5%, V
DDO
= 3.3V±5%
Symbol
V
IH
V
IL
I
IH
Parameter
Input High Voltage
Input Low Voltage
Input High Current
FB_SEL
PLL_BYPASS,
N_SEL0, N_SEL1
FB_SEL
PLL_BYPASS,
N_SEL0, N_SEL1
V
DD
= V
IN
= 3.465V
V
DD
= V
IN
= 3.465V
V
DD
= 3.465V, V
IN
= 0V
V
DD
= 3.465V, V
IN
= 0V
Test Conditions
OR
2.5V±5%, T
A
= 0°C
TO
70°C
Minimum
2
-0.3
Typical
Maximum
V
DD
+ 0.3
0.8
150
5
Units
V
V
µA
µA
µA
µA
-5
-150
I
IL
Input Low Current
IDT
™
/ ICS
™
LVDS FREQUENCY SYNTHESIZER W/FANOUT BUFFER
4
ICS844256BG REV. A NOVEMBER 7, 2008
ICS844256
FEMTOCLOCKS™ CRYSTAL-TO-LVDS FREQUENCY SYNTHESIZER W/INTEGRATED FANOUT BUFFER
T
ABLE
4D. LVDS DC C
HARACTERISTICS
,
V
DD
= V
DDO
= 3.3V±5% T
A
= 0°C
TO
70°C
Symbol
V
OD
Δ
V
OD
V
OS
Δ
V
OS
Parameter
Differential Output Voltage
V
OD
Magnitude Change
Offset Voltage
V
OS
Magnitude Change
1.15
1.25
Test Conditions
Minimum
275
Typical
350
Maximum
475
50
1.50
50
Units
mV
mV
V
mV
NOTE: Please refer to Parameter Measurement Information for output information.
T
ABLE
4E. LVDS DC C
HARACTERISTICS
,
V
DD
= 3.3V±5%, V
DDO
= 2.5V±5%, T
A
= 0°C
TO
70°C
Symbol
V
OD
Δ
V
OD
V
OS
Δ
V
OS
Parameter
Differential Output Voltage
V
OD
Magnitude Change
Offset Voltage
V
OS
Magnitude Change
1.15
1.25
Test Conditions
Minimum
250
Typical
350
Maximum
450
50
1.50
50
Units
mV
mV
V
mV
T
ABLE
5. C
RYSTAL
C
HARACTERISTICS
Parameter
Mode of Oscillation
Frequency
Equivalent Series Resistance (ESR)
Shunt Capacitance
Drive Level
NOTE: Characterized using an 18pF parallel resonant cr ystal.
15.625
Test Conditions
Minimum
Typical Maximum
25.5
50
7
1
Units
MHz
Ω
pF
mW
Fundamental
IDT
™
/ ICS
™
LVDS FREQUENCY SYNTHESIZER W/FANOUT BUFFER
5
ICS844256BG REV. A NOVEMBER 7, 2008
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