DATASHEET
DIFFERENTIAL SPREAD SPECTRUM CLOCK DRIVER
Description
The MK1493-05 is a spread-spectrum clock generator used
as a companion chip with a CK410 system clock. The
device is used in a PC or embedded system to substantially
reduce electro-magnetic interference (EMI). The device
provides a differential spread-spectrum high frequency
output and a reference output clock. An SMBus is
connected to the CK410 for command and control of the
MK1493-05. The input reference clock to the MK1493-05
comes directly from the CK410. No external, expensive
crystal or crystal oscillator is required.
A 16-pin TSSOP package is employed to maximize board
space utilization.
MK1493-05
Features
•
•
•
•
•
•
•
•
•
•
Packaged in 16-pin TSSOP package
Available in Pb (lead) free package
Single differential spread spectrum clock
Spread spectrum for EMI control
Supports SMBUS index read/write and blocks read/write
operations
Uses external 14.31818 MHz clock from CK410
Low output jitter design
Power down mode lowers Idd
Spread selection via hardware pins (down and center)
Industrial temperature range available (-40°C to +85°C)
NOTE: EOL for non-green parts to occur on 5/13/10
per PDN U-09-01
Block Diagram
VDD
2
SDATA
SCLK
3
SEL[3:1]
PWRDN
Control
Logic
Config.
Reg.
PLL Clock
Synthesis
CLKOUT
CLKOUT
Spread
Spectrum
Circuitry
CLKIN
Clock Buffer
REFOUT/SEL
3
VSS
IREF
IDT™
DIFFERENTIAL SPREAD SPECTRUM CLOCK DRIVER
1
MK1493-05
REV H 121809
MK1493-05
DIFFERENTIAL SPREAD SPECTRUM CLOCK DRIVER
CLOCK SYNTHESIZER
Pin Assignment
CLKIN
S3
S2
S1
PWRDWN
REF/SEL
SCLK
SDATA
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
VDDA
VSSA
IREF
VSSIREF
CLKOUT
CLKOUT
VSS
VDD
16 Pin 173 Mil (0.65mm) TSSOP
Spread Spectrum Selection Table
S3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
S2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
S1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
S0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Spread%
0.8
1.0
1.25
1.5
1.75
2.0
2.5
3.0
+0.3
+0.4
+0.5
+0.6
+0.8
+1.0
+1.25
+1.5
Spread Type
Down
Down
Down
Down
Down
Down
Down
Down
Center
Center
Center
Center
Center
Center
Center
Center
The spread enable and spread select[3:0] SMBus register bits control spread modulation and enable/disable. The CLKIN
clock input and REF clock output will not have or be spread. At device power-up the spread-spectrum is enabled and
hardware control is enabled. The S0 configuration bit is hard-coded to zero when hardware control mode is selected.
IDT™
DIFFERENTIAL SPREAD SPECTRUM CLOCK DRIVER
2
MK1493-05
REV H 121809
MK1493-05
DIFFERENTIAL SPREAD SPECTRUM CLOCK DRIVER
CLOCK SYNTHESIZER
Pin Descriptions
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Pin
Name
CLKIN
S3
S2
S1
PWRDN
REF/SEL
SCLK
SDATA
VDD
VSS
CLKOUT
CLKOUT
VSSIREF
IREF
VSSA
VDDA
Pin
Type
Input
Input
Input
Input
Input
I/O
Input
I/O
Power
Power
Output
Output
Power
Input
Power
Power
Pin Description
14.31818 MHz single-ended clock input.
Spread spectrum select pin #3. See table above. Internal pull-down.
Spread spectrum select pin #2. See table above. Internal pull-down.
Spread spectrum select pin #1. See table above. Internal pull-down.
Power down pin. Active high. Internal pull-down.
Strap input for selecting CLKOUT frequency and 14.31818 MHz reference clock.
SMBus compatible clock.
SMBus compatible data.
+3.3 V power supply for logic and outputs.
Ground for logic and outputs.
Selectable 96/100 MHz spread spectrum differential clock output.
Selectable 96/100 MHz spread spectrum differential clock output.
Ground for current reference.
Precision resistor attached to this pin is connected to the internal current reference.
Ground for PLL.
+3.3 V power supply for PLL.
IDT™
DIFFERENTIAL SPREAD SPECTRUM CLOCK DRIVER
3
MK1493-05
REV H 121809
MK1493-05
DIFFERENTIAL SPREAD SPECTRUM CLOCK DRIVER
CLOCK SYNTHESIZER
General SMBus Serial Interface
How to Write:
•
•
•
•
•
•
•
•
•
•
Controller (host) sends a start bit
Controller (host) sends the write address D4
(H)
IDT clock will
acknowledge
Controller (host) sends the beginning byte location =N
IDT clock will
acknowledge
Controller (host) sends the data byte count = X
IDT clock will
acknowledge
Controller (host) starts sending
Byte N through Byte N + X - 1
(see Note 2)
IDT clock will
acknowledge
each byte
one at a time
Controller (host) sends a Stop bit
How to Read:
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Controller (host) sends a start bit
Controller (host) sends the write address D4
(H)
IDT clock will
acknowledge
Controller (host) sends the beginning byte location =N
IDT clock will
acknowledge
Controller (host) will send a separate start bit
Controller (host) sends the read address D5
(H)
IDT clock will
acknowledge
Controller (host) sends the data byte count = X
IDT clock sends
Byte N + X - 1
IDT clock sends
Byte 0 through byte X (if X
(H)
was written to
byte 8)
Controller (host) will need to acknowledge each byte
Controller (host) will send a not acknowledge bit
Controller (host) will send a stop bit
Index Block Read Operation
Index Block Write Operation
Controller (Host)
T
WR
starTbit
WRite
ACK
Beginning Byte = N
ACK
Data Byte Count = X
ACK
Beginning Byte = N
O
O
O
Byte N + X - 1
ACK
P
stoP bit
O
O
O
N
P
.
X
B
Y
T
E
ACK
Data Bye Count = X
O
O
O
ACK
ACK
.
X
B
Y
T
E
Beginning Byte N
O
O
O
Byte N + X - 1
RT
RD
Beginning Byte = N
ACK
Slave Address D4
H)
IDT (Slave/Receiver)
T
WR
Controller (Host)
starTbit
Slave Address D4
(H)
WRite
ACK
IDT (Slave/Receiver)
Repeat starT
ReaD
ACK
Slave Address D5
(H)
Not acknowledge
stoP bit
IDT™
DIFFERENTIAL SPREAD SPECTRUM CLOCK DRIVER
4
MK1493-05
REV H 121809
MK1493-05
DIFFERENTIAL SPREAD SPECTRUM CLOCK DRIVER
CLOCK SYNTHESIZER
SMBus Address
The MK1493-05 is a slave-only device that supports block read and block write protocol using a single 7 bit address and
read/write bit. A block write (D4h) or block read (D5h) is made up of seven (7) bits and one (1) read/write bit.
A6
1
A5
1
A4
0
A3
1
A2
0
A1
1
A0
0
R/W#
X
The applications where the indexed block write and block
are used, the dummy byte (bit 11-18) functions as a
register-offset (8 bits) pointer.
Byte 0: Control Register
Bit
7
6
5
4
3
2
1
0
Description
Spread Select 0
Spread Select 1
Spread Select 2
Spread Select 3
Select Output Frequency,
1=100 MHz, 0=96 MHz
Reserved, must be written as 0
Spread spectrum enable,
0=spread OFF, 1=spread ON
Hardware/Software control of
spread enable, S[3:0], and
output frequency.
0=h.w cinttrol, 1=s/w control
Type
RW
RW
RW
RW
RW
RW
RW
RW
Power Up
Condition
0
S1
S2
S3
SEL 100/96
0
1=spread ON
0=h/w control
Output(s) Affected
CLKOUT, CLKOUT
CLKOUT, CLKOUT
CLKOUT, CLKOUT
CLKOUT, CLKOUT
CLKOUT, CLKOUT
Not applicable
CLKOUT, CLKOUT
Not applicable
Notes
1,2,3
1,2,3
1,2,3
1,2,3
1,2
1
1
IDT™
DIFFERENTIAL SPREAD SPECTRUM CLOCK DRIVER
5
MK1493-05
REV H 121809
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