FEMTOCLOCKS™ 1:5, CRYSTAL-TO-
LVCMOS/LVTTL FREQUENCY SYNTHESIZER
ICS840245I
G
ENERAL
D
ESCRIPTION
The ICS840245I is a low skew, 1-to-5 LVCMOS/
IC
S
LVTTL SATA/SAS Clock Generator and is a mem-
HiPerClockS™
ber of the HiPerClocks
TM
family of high performance
clock solutions from IDT. The ICS840245I can syn-
thesize 75MHz reference clock frequencies with a
25MHz crystal. Each of the 5 outputs on the ICS840245I can
drive two series terminated 50Ω transmission lines, effectively
making the ICS840245I a 1-to-10 clock generator. An output
enable (OE) pin, which controls only the Q4 output, allows the
application to use Q4 as an optional output (for example, test
output pin). The ICS840245I uses IDT’s 3
rd
generation low phase
noise VCO technology and can achieve 1ps or lower typical
random rms phase jitter. The ICS840245I is packaged in a
16-pin TSSOP package.
F
EATURES
• Five LVCMOS outputs, 15Ω typical output impedance
• Crystal oscillator interface
• Supports the following output frequency: 75MHz
• Output skew: 25ps (typical)
• RMS phase jitter @ 75MHz (900kHz - 7.5MHz):
0.454ps (typical)
• Output supply modes:
Core/Output
3.3V/3.3V
3.3V/2.5V
2.5V/2.5V
• -40°C to 85°C ambient operating temperature
• Available in both standard (RoHS 5) and lead-free (RoHS 6)
packages
B
LOCK
D
IAGRAM
PLL_SEL
Pullup
Q0
Q1
25MHz
XTAL_IN
XTAL_OUT
P
IN
A
SSIGNMENT
XTAL_OUT
XTAL_IN
V
DDA
OE
V
DD
GND
PLL_SEL
GND
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
DDO
Q0
Q1
GND
Q2
Q3
V
DDO
Q4
0
Q2
OSC
Phase
Detector
VCO
600MHz
N=8
1
Q3
Q4
M = 24
(fixed)
ICS840245I
16-Lead TSSOP
4.4mm x 5.0mm x 0.92mm
package body
G Package
Top View
OE
Pullup
IDT
™
/ ICS
™
LVCMOS/LVTTL FREQUENCY SYNTHESIZER
1
ICS840245AGI REV. B NOVEMBER 16, 2006
ICS840245I
FEMTOCLOCKS™ 1:5, CRYSTAL-TO-LVCMOS/LVTTL FREQUENCY SYNTHESIZER
T
ABLE
1. P
IN
D
ESCRIPTIONS
Number
1,
2
3
4
5
6, 8, 13
7
9, 11, 12,
14, 15
10, 16
Name
XTAL_OUT,
XTAL_IN
V
DDA
OE
V
DD
GND
PLL_SEL
Q4, Q3, Q2,
Q1, Q0
V
DDO
Type
Input
Power
Input
Power
Power
Input
Output
Power
Pullup
Pullup
Description
Cr ystal oscillator interface.
Analog supply pin.
Output clock enable pin. When HIGH, Q4 output is enabled.
When LOW, forces Q4 to Hi-Z state. LVCMOS/LVTTL interface levels.
See Table 3A.
Core supply pin.
Power supply ground.
PLL select pin. Selects between PLL and bypass mode. When HIGH,
PLL is enabled. LVCMOS/LVTTL interface levels. See Table 3B.
Single-ended clock outputs. LVCMOS/LVTTL interface levels.
Output supply pins.
NOTE:
Pullup
refers to internal input resistors. See Table 2, Pin Characteristics, for typical values.
T
ABLE
2. P
IN
C
HARACTERISTICS
Symbol
C
IN
C
PD
R
PULLUP
R
OUT
Parameter
Input Capacitance
Power Dissipation Capacitance
Input Pullup Resistor
Output Impedance
3.3V±5%
2.5V±5%
Test Conditions
Minimum
Typical
4
8
51
15
20
Maximum
Units
pF
pF
kΩ
Ω
Ω
T
ABLE
3A. C
ONTROL
F
UNCTION
T
ABLE
Control Input
OE
0
1
Output
Q0
Hi-Z
Active
T
ABLE
3B. PLL_SEL F
UNCTION
T
ABLE
Control Input
PLL_SEL
0
1
Outputs
Q0:Q4
Bypass
PLL
IDT
™
/ ICS
™
LVCMOS/LVTTL FREQUENCY SYNTHESIZER
2
ICS840245AGI REV. B NOVEMBER 16, 2006
ICS840245I
FEMTOCLOCKS™ 1:5, CRYSTAL-TO-LVCMOS/LVTTL FREQUENCY SYNTHESIZER
A
BSOLUTE
M
AXIMUM
R
ATINGS
Supply Voltage, V
DD
Inputs, V
I
Outputs, V
O
4.6V
-0.5V to V
DD
+ 0.5 V
-0.5V to V
DDO
+ 0.5V
NOTE: Stresses beyond those listed under Absolute
Maximum Ratings may cause permanent damage to the
device. These ratings are stress specifications only. Functional op-
eration of product at these conditions or any conditions beyond
those listed in the
DC Characteristics
or
AC Characteristics
is not
implied. Exposure to absolute maximum rating conditions for ex-
tended periods may affect product reliability.
Package Thermal Impedance,
θ
JA
89°C/W (0 lfpm)
Storage Temperature, T
STG
-65°C to 150°C
T
ABLE
4A. P
OWER
S
UPPLY
DC C
HARACTERISTICS
,
V
DD
= V
DDA
= V
DDO
= 3.3V±5%, T
A
= -40°C
TO
85°C
Symbol
V
DD
V
DDA
V
DDO
I
DD
I
DDA
I
DDO
Parameter
Core Supply Voltage
Analog Supply Voltage
Output Supply Voltage
Power Supply Current
Analog Supply Current
Output Supply Current
No Load
Test Conditions
Minimum
3.135
V
DD
– 0.08
3.135
Typical
3.3
3.3
3.3
Maximum
3.465
V
DD
3.465
48
8
36
Units
V
V
V
mA
mA
mA
T
ABLE
4B. P
OWER
S
UPPLY
DC C
HARACTERISTICS
,
V
DD
= V
DDA
= 3.3V±5%, V
DDO
= 2.5V±5%, T
A
= -40°C
TO
85°C
Symbol
V
DD
V
DDA
V
DDO
I
DD
I
DDA
I
DDO
Parameter
Core Supply Voltage
Analog Supply Voltage
Output Supply Voltage
Power Supply Current
Analog Supply Current
Output Supply Current
No Load
Test Conditions
Minimum
3.135
V
DD
– 0.12
2.375
Typical
3.3
3.3
2.5
Maximum
3.465
V
DD
2.625
48
12
32
Units
V
V
V
mA
mA
mA
T
ABLE
4C. P
OWER
S
UPPLY
DC C
HARACTERISTICS
,
V
DD
= V
DDA
= V
DDO
= 2.5V±5%, T
A
= -40°C
TO
85°C
Symbol
V
DD
V
DDA
V
DDO
I
DD
I
DDA
I
DDO
Parameter
Core Supply Voltage
Analog Supply Voltage
Output Supply Voltage
Power Supply Current
Analog Supply Current
Output Supply Current
No Load
Test Conditions
Minimum
2.375
V
DD
– 0.12
2.375
Typical
2.5
2.5
2.5
Maximum
2.625
V
DD
2.625
43
12
32
Units
V
V
V
mA
mA
mA
IDT
™
/ ICS
™
LVCMOS/LVTTL FREQUENCY SYNTHESIZER
3
ICS840245AGI REV. B NOVEMBER 16, 2006
ICS840245I
FEMTOCLOCKS™ 1:5, CRYSTAL-TO-LVCMOS/LVTTL FREQUENCY SYNTHESIZER
T
ABLE
4D. LVCMOS/LVTTL DC C
HARACTERISTICS
,
T
A
= -40°C
TO
85C
Symbol Parameter
V
IH
V
IL
I
IH
I
IL
V
OH
V
OL
Input High Voltage
Input Low Voltage
Input High Current
Input Low Current
OE, PLL_SEL
OE, PLL_SEL
Test Conditions
V
DD
= 3.3V
V
DD
= 2.5V
V
DD
= 3.3V
V
DD
= 2.5V
V
DD
= V
IN
= 3.465V or 2.625V
V
DD
= 3.465V or 2.625V,
V
IN
= 0V
V
DDO
= 3.3V±5%
V
DDO
= 2.5V±5%
V
DDO
= 3.3V±5% or 2.5V±5%
-150
2.6
1.8
0.5
Minimum Typical
2
1.7
-0.3
-0.3
Maximum
V
DD
+ 0.3
V
DD
+ 0.3
0.8
0.7
5
Units
V
V
V
V
µA
µA
V
V
V
Output High Voltage; NOTE 1
Output Low Voltage; NOTE 1
NOTE 1: Outputs terminated with 50
Ω
to V
DDO
/2. See Parameter Measurement Information, Output Load Test Circuit.
T
ABLE
5. C
RYSTAL
C
HARACTERISTICS
Parameter
Mode of Oscillation
Frequency
Equivalent Series Resistance (ESR)
Shunt Capacitance
Drive Level
NOTE: Characterized using an 18pf parallel resonant crystal.
Test Conditions
Minimum
Typical
25
50
7
1
Maximum
Units
MHz
Ω
pF
mW
Fundamental
IDT
™
/ ICS
™
LVCMOS/LVTTL FREQUENCY SYNTHESIZER
4
ICS840245AGI REV. B NOVEMBER 16, 2006
ICS840245I
FEMTOCLOCKS™ 1:5, CRYSTAL-TO-LVCMOS/LVTTL FREQUENCY SYNTHESIZER
T
ABLE
6A. AC C
HARACTERISTICS
,
V
DD
= V
DDA
= V
DDO
= 3.3V±5%, T
A
= -40°C
TO
85°C
Symbol
f
OUT
Parameter
Output Frequency
Output Skew; NOTE 1, 3
RMS Phase Jitter (Random);
NOTE 2
Output Rise/Fall Time
Test Conditions
Minimum
Typical
75
55
Integration Range: 900kHz - 7.5MHz
20% to 80%
250
0.503
600
51
Maximum
Units
MHz
ps
ps
ps
%
t
sk(o)
t
jit(Ø)
t
R
/ t
F
odc
Output Duty Cycle
49
NOTE 1: Defined as skew between outputs at the same supply voltages and with equal load conditions.
Measured at V
DDO
/2.
NOTE 2: Please refer to the Phase Noise Plot.
NOTE 3: This parameter is defined in accordance with JEDEC Standard 65.
T
ABLE
6B. AC C
HARACTERISTICS
,
V
DD
= V
DDA
= 3.3V±5%, V
DDO
= 2.5V±5%, T
A
= -40°C
TO
85°C
Symbol
f
OUT
Parameter
Output Frequency
Output Skew; NOTE 1, 3
RMS Phase Jitter (Random);
NOTE 2
Output Rise/Fall Time
Test Conditions
Minimum
Typical
75
55
Integration Range: 900kHz - 7.5MHz
20% to 80%
250
0.494
600
51
Maximum
Units
MHz
ps
ps
ps
%
t
sk(o)
t
jit(Ø)
t
R
/ t
F
odc
Output Duty Cycle
49
NOTE 1: Defined as skew between outputs at the same supply voltages and with equal load conditions.
Measured at V
DDO
/2.
NOTE 2: Please refer to the Phase Noise Plot.
NOTE 3: This parameter is defined in accordance with JEDEC Standard 65.
T
ABLE
6C. AC C
HARACTERISTICS
,
V
DD
= V
DDA
= V
DDO
= 2.5V±5%, T
A
= -40°C
TO
85°C
Symbol
f
OUT
Parameter
Output Frequency
Output Skew; NOTE 1, 3
RMS Phase Jitter (Random);
NOTE 2
Output Rise/Fall Time
Test Conditions
Minimum
Typical
75
50
Integration Range: 900kHz - 7.5MHz
20% to 80%
300
0.454
600
51
Maximum
Units
MHz
ps
ps
ps
%
t
sk(o)
t
jit(Ø)
t
R
/ t
F
odc
Output Duty Cycle
49
NOTE 1: Defined as skew between outputs at the same supply voltages and with equal load conditions.
Measured at V
DDO
/2.
NOTE 2: Please refer to the Phase Noise Plot.
NOTE 3: This parameter is defined in accordance with JEDEC Standard 65.
IDT
™
/ ICS
™
LVCMOS/LVTTL FREQUENCY SYNTHESIZER
5
ICS840245AGI REV. B NOVEMBER 16, 2006
微控制器 MCU
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