CFPT-9000 SMD TCXO/TCVCXOs
ISSUE 12; 1 NOVEMBER 2008 - RoHS 2002/95/EC
Supply Voltage
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Description
Sub 1ppm performance TCXO manufactured for us by
Rakon utilising their Pluto™ ASIC technology, a single chip
oscillator and analogue compensation circuit operating over
an extended temperature range. Its ability to function down to
a supply voltage of 2.4V and low power consumption make it
particularly suitable for mobile applications
7 x 5mm
3.2, 5, 6.4, 8.192, 9.6, 12.688375, 10, 12.8, 13, 14.4, 14.85,
16.384, 16.367, 16.8, 19.2, 19.44, 19.8, 20, 24.5535, 32.768,
38.88, 40MHz
HCMOS 15pF
ACMOS 50pF max.
(available on request, contact sales office)
Sinewave 10k
W
// 10pF, AC-coupled
Clipped sinewave 10k
W
// 10pF, AC-coupled
Temperature: see table
Typical Supply Voltage Variation ±10% < ±0.2 ppm*
Typical Load Coefficient 15pF ±5pF < ±0.2 ppm*
*Dependent on frequency and output type
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Standard 3.3V, 5.0V ( see table)
Supply voltages in the range 2.4 to 6.0V available to order,
please contact our sales office
HCMOS Typically:
1+Frequency(MHz)*Supply(V)*{Load(pF)+15}*10
–3
mA
e.g. 20MHz, 5V, 15pF ≈ 4mA
Sinewave <8mA
Clipped Sinewave Typically:
1+Frequency(MHz)*1.2*{Load(pF)+30}*10
–3
mA
±1ppm maximum in first year, frequency <20MHz
±2ppm maximum in first year, frequency > 0MHz
±3ppm maximum for 10 years (including the first year),
frequency <20MHz
±5ppm maximum for 10 years (includng the first year),
frequency >20MHz
±1ppm max
Optional reference voltage output on Pad 1, suitable for
potentiometer supply or DAC reference.
1. No output (standard option)
2. 2.2V, for Min. Vs>2.4V
3. 2.7V, for Min. Vs>3.0V
4. 4.2V, for Min. Vs>4.5V
Maximum load current (mA) = Vref/10
Supply Current
Package Outline
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Standard Frequencies
Ageing
Output Compatibility & Load
After Reflow
Reference Voltage, Vref
Frequency Stability
TCXOs
Frequency Adjustment
Three options with external Voltage Control applied to Pad 10:
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A - Ageing adjustment: > ±5ppm, frequency < 20MHz
(Standard Option)
> ±7ppm, frequency > 20MHz
B - No frequency adjustment initial calibration @ 25°C
< ±1.0 ppm
C - High Pulling ±10ppm to ±50ppm can be available
depending on frequency and stability options.
Please consult our sales office
Linearity: < 1%
Slope: Positive
Input resistance: > 100k
W
Modulation bandwidth: > 2kHz
Standard voltage control ranges:
Without reference voltage - Vs=5.0V 2.5V±1V
Without reference voltage - Vs=3.3V 1.65V±1V
With reference voltage - Vc=0V to Vref
–55 to 125°C
Logic ‘1’ (>60%Vs) to Pad 8 enables output
For manual frequency adjustment connect an external 50kW
potentiometer between Pad 1 (Reference Voltage) and Pad 4
(GND) with wiper connected to Pad 10 (Voltage Control). Please
specify reference voltage as part of the ordering code
Environmental
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Vibration: IEC 60068-2-6 Test Fc Procedure B4, 10-60Hz
1.5mm displacement, 60 –2000Hz at 10gn, 30 minutes in
each of three mutually perpendicular planes at 1 octave per
minute
Shock: IEC 60068-2-27 Test Ea, 1500g acceleration for
0.5ms duration, 1/2 sine pulse, 3 shocks in each direction
along three mutually perpendicular planes
Solderabiltiy: MIL-STD-202, Method 208, Category 3
Factory code + Manufacturing identifier (xx) + Pad 1 / Static
sensitivity identifier (Triangle) + Part Number (Four digits) +
Date Code
Bulk or Tape & Reel
Frequency + Model Number + Frequency Stability vs
Operating Temperature Range Code + Reference Voltage
Code + Frequency Adjustment Code
Marking Includes
Storage Temperature Range
Packaging
Minimum Order Information Required
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Tri-State Operation
Logic ‘0’ (<20%Vs) to Pad 8 disables output
When at logic ‘0’, the output stage is disabled for all output
options, but the oscillator and compensation circuit are still
active (current consumption <1mA)
IQD Frequency Products Ltd, Station Road, Crewkerne, Somerset TA18 8AR, United Kingdom
Tel: +44 (1460) 270200; Fax: +44 (1460) 72578;
Email: info@iqdfrequencyproducts.com Web: www.iqdfrequencyproducts.com
FPGA/CPLD
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