CMX654
V23 Transmit Modulator
D/654/3 June 1998
Advance Information
Features
•
1200bits/sec, V23 Transmit Modulator
•
3.0V to 5.5V Supply: 1mA typical at 3V
•
Zero Power Mode: 1µA typical
•
1200bits/sec Tx Data Retiming
•
3.58MHz Xtal/Clock Rate
•
Meets ITU and ETSI Specifications
•
16 Pin SOIC and DIP Packages
Applications
•
Caller ID generation for:
•
ISDN Terminal Adapters
•
Wireless Local Loop System
•
ISDN PABX Applications
•
Pair-Gain Systems
•
Public Switched Telephone Networks
•
Trunk Exchanges
1.1
Brief Description
The CMX654 is a low power CMOS integrated circuit for the transmission of asynchronous 1200bits/sec data in
accordance with ITU, V.23 and ETSI specifications.
The device incorporates an optional Tx data retiming function. The device can be operated so that only the
mark or space tone is produced.
The CMX654 may be used in a wide range of telephone telemetry systems. With a low voltage requirement of
3.0V it is suitable for both portable terminal and line powered applications. A very low current 'sleep' mode (1
µ
A
typ.) and operating current of 1mA typ. mean the device is ideal for line powered applications. A 3.58MHz
standard Xtal/Clock rate is required and the device operates from a 3.0 to 5.5V supply. Both SOIC (D4) and
Plastic DIL (P3) 16-pin package types are available.
©
1998
Consumer Microcircuits Limited
V.23 Transmit Modulator
CMX654
CONTENTS
Section
Page
1.1 Brief Description ............................................................................................ 1
1.2 Block Diagram ................................................................................................ 3
1.3 Signal List ....................................................................................................... 3
1.4 External Components .................................................................................... 5
1.5 General Description ....................................................................................... 5
1.5.1 Xtal Osc and Clock Dividers............................................................. 5
1.5.2 Mode Control Logic .......................................................................... 6
1.5.3 FSK Modulator and Transmit Filter .................................................. 6
1.5.4 Tx Data Retiming.............................................................................. 7
1.6 Application Notes........................................................................................... 8
1.6.1 Line Interface.................................................................................... 8
1.7 Performance Specification ............................................................................ 9
1.7.1 Electrical Performance ..................................................................... 9
1.7.2 Packaging....................................................................................... 12
©
1998
Consumer Microcircuits Limited
2
D/654/3
V.23 Transmit Modulator
CMX654
1.2
Block Diagram
Figure 1 Block Diagram
1.3
Signal List
Signal
Description
CMX654
D4/P3
Pin No.
1
2
3
Name
XTALN
XTAL/CLOCK
M0
Type
O/P
I/P
I/P
The output of the on-chip Xtal oscillator inverter.
The input to the on-chip Xtal oscillator inverter.
A logic level input for setting the mode of the
device. See Section 1.5.2.
A logic level input for setting the mode of the
device. See Section 1.5.2.
Connect to V
SS
No connection, do not connect to this pin.
The output of the FSK generator.
The negative supply rail (ground).
4
M1
I/P
5
6
7
8
-
-
TXOP
V
SS
-
N/C
O/P
Power
©
1998
Consumer Microcircuits Limited
3
D/654/3
V.23 Transmit Modulator
CMX654
CMX654
D4/P3
Pin No.
9
Signal
Description
Name
V
BIAS
Type
O/P
Internally generated bias voltage, held at VDD/2
when the device is not in 'Zero-Power' mode.
Should be decoupled to VSS by a capacitor
mounted close to the device pins.
Connect to VDD.
A logic level input for either the raw input to the
FSK Modulator or data to be re-timed depending
on the state of the M0, M1 and CLK inputs. See
Section 1.5.3.
A logic level input which may be used to clock
data bits into the Tx FSK Data Retiming block.
No connection, do not connect to this pin.
No connection, do not connect to this pin.
"Ready for Tx data transfer" output of the on-
chip data retiming circuit. This open-drain active
low output may be used as an Interrupt
Request/Wake-up input to the associated
µ
C. An
external pull-up resistor should be connected
between this output and VDD.
The positive supply rail. Levels and thresholds
within the device are proportional to this voltage.
Should be decoupled to VSS by a capacitor
mounted close to the device pins.
10
11
-
TXD
-
I/P
12
CLK
I/P
13
14
15
-
-
RDYN
N/C
N/C
O/P
16
V
DD
Power
Notes:
I/P =
O/P =
N/C =
Input
Output
No Connection
V
DD
and V
BIAS
decoupling are very important. It is recommended that the decoupling capacitors are placed so
that connections between them and the device pins are as short as practicable.
©
1998
Consumer Microcircuits Limited
4
D/654/3
V.23 Transmit Modulator
CMX654
1.4
External Components
R1
X1
100k
Ω
3.579545MHz
C1, C2
C3
C4
18pF
0.1
µ
F
0.1
µ
F
Resistors
±
5%, capacitors
±
10% unless otherwise stated.
Figure 2 Recommended External Components for Typical Application
1.5
1.5.1
General Description
Xtal Osc and Clock Dividers
Frequency and timing accuracy of the CMX654 is determined by a 3.579545MHz clock present at the
XTAL/CLOCK pin. This may be generated by the on-chip oscillator inverter using the external components C1,
C2 and X1 of Figure 2, or may be supplied from an external source to the XTAL/CLOCK input. If supplied from
an external source, C1, C2 and X1 should not be fitted.
The on-chip oscillator is turned off in the 'Zero-Power' mode.
If the clock is provided by an external source which is not always running, then the 'Zero-Power' mode must be
set when the clock is not available. Failure to observe this rule may cause a significant rise in the supply
current drawn by CMX654 as well as generating undefined states of the RDYN output.
©
1998
Consumer Microcircuits Limited
5
D/654/3
电源技术
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
