a
FEATURES
23 ns or 65 ns Propagation Delay
Single-Supply Operation
Compatible with +3 V and +5 V Logic
Separate Input and Output Sections
Low Power
Wide Input Range: –5 V to +3.9 V
APPLICATIONS
Battery Operated Instrumentation
Line Receivers
Level Translators
Read Channel Detection
23 ns and 65 ns
Low Voltage Comparators
CMP401/CMP402
FUNCTIONAL BLOCK DIAGRAM
V
ANALOG+
=
+0V TO +5V
V
DIGITAL
=
+3V OR +5V
IN+
OUTPUT
IN–
V
ANALOG–
=
+0V TO –5V
NOTE: (V
ANALOG+
) – (V
ANALOG–
)
≥
3V
GENERAL DESCRIPTION
The CMP401 and CMP402 are 23 ns and 65 ns quad comp-
arators with separate input and output supplies. Separate supplies
enable the input stage to be operated from +3 volts to as high as
±6
volts. The output can be supplied with either +3 volts or
+5 volts as determined by the interface logic or available supplies.
Independent input and output supplies combined with fast prop-
agation make the CMP401 and CMP402 excellent choices for
interfacing to portable instrumentation.
The CMP401 and CMP402 are specified over the extended
industrial (–40°C to +125°C) temperature range. Both are
available in 16-pin plastic DIP or narrow SO-16 surface mount
packages. Consult factory for 16-lead TSSOP availability.
50mV
100
90
2v
10
0%
10nS
CMP401: 20 MHz Noninverting Switching. V
IN
=
±
100 mV
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
© Analog Devices, Inc., 1995
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
Fax: 617/326-8703
CMP401/CMP402–SPECIFICATIONS
ELECTRICAL SPECIFICATIONS
(@ V+
Parameter
INPUT CHARACTERISTICS
Offset Voltage
1
Offset Voltage
1
Hysteresis
Input Bias Current
Input Offset Current
Input Common-Mode Voltage Range
Common-Mode Rejection
Large Signal Voltage Gain
Offset Voltage Drift
OUTPUT CHARACTERISTICS
Output High Voltage
Output Low Voltage
POWER SUPPLY
Power Supply Rejection Ratio
Analog Supply Current – CMP401
Digital Supply Current – CMP401
Analog Supply Current – CMP401
Digital Supply Current – CMP401
Analog Supply Current – CMP402
Digital Supply Current – CMP402
Analog Supply Current – CMP402
Digital Supply Current – CMP402
DYNAMIC PERFORMANCE
Propagation Delay – CMP401
Propagation Delay – CMP401
Propagation Delay – CMP401
Propagation Delay – CMP402
Propagation Delay – CMP402
Propagation Delay – CMP402
Symbol
V
OS
V
OS
I
B
I
B
I
OS
V
CM
CMRR
A
VO
∆V
OS
/∆T
V
OH
V
OL
PSRR
I
ANA
I
DIG
I
ANA
I
DIG
I
ANA
I
DIG
I
ANA
I
DIG
t
P
t
P
t
P
t
P
t
P
t
P
ANA
ANA
=
V+
DIG
= +5.0 V, V
CM
= 0.1 V, –40 C
≤
T
A
≤
+125 C unless otherwise noted)
Conditions
T
A
= +25°C
2
T
A
= +25°C
3
4
±
3
+4.0
10
1
4.6
0.2
60
6.5
2.0
8.0
2.25
1.4
2.0
1.75
2.25
Min
Typ
Max
3
4
Units
mV
mV
mV
µA
µA
µA
V
dB
V/mV
µV/°C
V
V
dB
mA
mA
mA
mA
mA
mA
mA
mA
0.1 V
≤
V
CM
≤
3.9 V
R
L
= 10 kΩ
0
60
I
OH
= –3.2 mA
I
OL
= 3.2 mA
V+
ANA
and V+
DIG
+2.7 V to +6 V
T
A
= +25°C
V
O
= 0 V, R
L
=
∞,
T
A
= +25°C
V
O
= 0 V, R
L
=
∞
T
A
= +25°C
V
O
= 0 V, R
L
=
∞,
T
A
= +25°C
V
O
= 0 V, R
L
=
∞
100 mV Step with 20 mV OD,
T
A
= +25°C
100 mV Step with 5 mV OD,
T
A
= +25°C
100 mV Step with 20 mV OD
100 mV Step with 20 mV OD,
T
A
= +25°C
100 mV Step with 5 mV OD,
T
A
= +25°C
100 mV Step with 20 mV OD
17
33
23
ns
ns
ns
ns
ns
ns
30
54
60
75
65
ELECTRICAL SPECIFICATIONS
(@ V
Parameter
INPUT CHARACTERISTICS
Offset Voltage
1
Input Common-Mode Voltage Range
Input Differential Voltage Range
Common-Mode Rejection
OUTPUT CHARACTERISTICS
Output High Voltage
Output Low Voltage
POWER SUPPLY
Power Supply Rejection Ratio
Analog Supply Current – CMP401
Digital Supply Current – CMP401
Analog Supply Current – CMP402
Digital Supply Current – CMP402
DYNAMIC PERFORMANCE
Propagation Delay – CMP401
Propagation Delay – CMP402
V
OS
V
CM
V
DIFF
CMRR
V
OH
V
OL
PSRR
I
ANA
I
DIG
I
ANA
I
DIG
t
P
t
P
= V
DIG
= +3.0 V, V
CM
= 0.1 V, T
A
= +25 C unless otherwise noted)
Conditions
Min
Typ
Max
4.5
+2.0
Units
mV
V
V
dB
V
V
dB
mA
mA
mA
mA
ns
ns
Symbol
0.1 V
≤
V
CM
≤
1.9 V
I
OH
= –3.2 mA
I
OL
= 3.2 mA
V+
ANA
and V+
DIG
+2.7 V to +6 V
V
O
= 0 V, R
L
=
∞
V
O
= 0 V, R
L
=
∞
100 mV Step with 20 mV OD
100 mV Step with 20 mV OD
0
±
2.0
60
2.6
0.25
60
6
1
1.2
1
32
70
–2–
REV. 0
CMP401/CMP402
ELECTRICAL SPECIFICATIONS
Parameter
INPUT CHARACTERISTICS
Offset Voltage
1
Input Common-Mode Voltage Range
Input Differential Voltage Range
Common-Mode Rejection
Offset Voltage Drift
POWER SUPPLY
Power Supply Rejection Ratio
Analog Supply Current – CMP401
Digital Supply Current – CMP401
Analog Supply Current – CMP402
Digital Supply Current – CMP402
DYNAMIC PERFORMANCE
Propagation Delay – CMP401
Propagation Delay – CMP402
NOTES
1
Offset voltage is defined as (V
OS+
+ V
OS–
)/2.
Specifications subject to change without notice.
(@ V±
ANA
=
±5
V, V
DIG
= +5.0 V, T
A
= +25 C unless otherwise noted)
Conditions
V
CM
= 0 V
–4.9 V
≤
V
CM
≤
3.9 V
–5.0
±
8.0
60
1
V±
ANA
±
3 V to
±
6 V
V
O
= 0 V, R
L
=
∞
V
O
= 0 V, R
L
=
∞
100 mV Step with 20 mV OD
100 mV Step with 20 mV OD
60
6.5
2.0
2.0
2.0
23
65
Min
Typ
Max
3
+4.0
Units
mV
V
V
dB
µV/°C
dB
mA
mA
mA
mA
ns
ns
Symbol
V
OS
V
CM
V
DIFF
CMRR
∆V
OS
/∆T
PSRR
I
ANA
I
DIG
I
ANA
I
DIG
t
P
t
P
5
REV. 0
–3–
CMP401/CMP402
ABSOLUTE MAXIMUM RATINGS
1
DICE CHARACTERISTICS
2
1
16 15
Total Analog Supply Voltage . . . . . . . . . . . . . . . . . . . . . +16 V
Digital Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . +7 V
Analog Positive Supply—Digital Positive Supply . . . . –200 mV
Input Voltage
2
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±
7 V
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . .
±
9 V
Output Short-Circuit Duration to GND . . . . . . . . . Indefinite
Storage Temperature Range
P, S, RU Package . . . . . . . . . . . . . . . . . . . –65°C to +150°C
Operating Temperature Range
CMP401G, CMP402G . . . . . . . . . . . . . . –40°C to +125°C
Junction Temperature Range
P, S, RU Package . . . . . . . . . . . . . . . . . . . –65°C to +150°C
Lead Temperature Range (Soldering, 60 sec) . . . . . . . +300°C
Package Type
16-Pin Plastic DIP (P)
16-Pin SO (S)
16-Lead TSSOP (RU)
JA
3
JC
3
4
5
14
13
12
6
11
7
8
9
10
Units
°C/W
°C/W
°C/W
CMP401/CMP402 Die Size 0.065
×
0.069 inch, 4,485 sq. mils
Substrate (Die Backside) Is Connected to V+
Transistor Count 104.
V+ ANA
V+ DIG
90
113
180
47
37
37
NOTES
1
Absolute maximum ratings apply to both DICE and packaged parts, unless
otherwise noted.
2
The analog input voltage is equal to
±
7 volts or the analog supply voltage,
whichever is less.
3
θ
JA
is specified for the worst case conditions, i.e.,
θ
JA
is specified for device in socket
for P-DIP, and
θ
JA
is specified for device soldered in circuit board for SOIC and
TSSOP packages.
+IN
–IN
OUT
ORDERING GUIDE
Model
CMP401GP
CMP401GS
CMP401GRU
CMP402GP
CMP402GS
CMP402GRU
Temperature
Range
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
Package
Description
16-Pin Plastic DIP
16-Pin SOIC
16-Lead TSSOP
16-Pin Plastic DIP
16-Pin SOIC
16-Lead TSSOP
Package
Option
N-16
R-16A
RU-16
N-16
R-16A
RU-16
V– ANA
DIG GND
Figure 1. Simplified Schematic
CMP401/CMP402 PIN CONFIGURATIONS
16-Lead Epoxy DIP
(P Suffix)
OUT B 1
OUT A 2
V+ DIG 3
V+ ANA 4
–IN A 5
+IN A 6
–IN B 7
+IN B 8
16 OUT C
15 OUT D
14 DIG GND
13 V– ANA
12 –IN D
11 +IN D
10 –IN C
9 +IN C
16-Lead Narrow-SO
(S Suffix)
OUT B
OUT A
V+ DIG
V+ ANA
–IN A
+IN A
–IN B
+IN B
1
2
3
4
5
6
7
8
16 OUT C
15 OUT D
16-Lead
TSSOP
(RU Suffix)
1
OUT B
OUT A
V+ DIG
V+ ANA
–IN A
+IN A
–IN B
+IN B
8
16
OUT C
OUT D
DIG GND
V– ANA
–IN D
+IN D
–IN C
+IN C
9
CMP401/
402
TOP VIEW
(Not to Scale)
14 DIG GND
13 V– ANA
12 –IN D
11 +IN D
10 –IN C
9 +IN C
CMP401/
402
TOP VIEW
(Not to Scale)
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the CMP401/CMP402 features proprietary ESD protection circuitry, permanent damage
may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
–4–
REV. 0
Typical Performance Characteristics–CMP401/CMP402
40
35
+V
AN
= +V
DIG
= +5V
–V
AN
= 0V TO –5V
110
90
PROPAGATION DELAY – ns
80
70
60
+P
DELAY
50
40
30
0
10
20
30
OVERDRIVE – mV
40
50
40
+V
AN
= +V
DIG
= +5V
–V
AN
= 0V TO –5V
R
S
≤
50Ω, C
L
= 15pF
T
A
= +25°C
+V
AN
= +V
DIG
= +5V
–V
AN
= 0V TO –5V
R
S
≤
50Ω, C
L
= 15pF
PROPAGATION DELAY – ns
PROPAGATION DELAY – ns
30
25
R
S
≤
50Ω, C
L
= 15pF
T
A
= +25°C
+P
DELAY
35
30
+P
DELAY
25
20
15
–P
DELAY
10
5
0
20
–P
DELAY
–P
DELAY
15
20
0
10
20
30
OVERDRIVE – mV
40
50
10
–50
–25
0
25
50
75
TEMPERATURE –
°C
100
125
Figure 2. CMP401 Propagation Delay
vs. Overdrive
Figure 3. CMP402 Propagation Delay
vs. Overdrive
Figure 4. CMP401 Propagation Delay
vs. Temperature – 5 mV OD
90
+V
AN
= +V
DIG
= +5V
–V
AN
= 0V TO –5V
R
S
≤
50Ω, C
L
= 15pF
30
60
+P
DELAY
80
25
PROPAGATION DELAY – ns
50
PROPAGATION DELAY – ns
70
+P
DELAY
60
20
PROPAGATION DELAY – ns
+P
DELAY
40
–P
DELAY
30
15
–P
DELAY
10
+V
AN
= +V
DIG
= +5V
–V
AN
= 0V TO –5V
R
S
≤
50Ω, C
L
= 15pF
–25
0
25
50
75
TEMPERATURE –
°C
100
125
50
–P
DELAY
20
+V
AN
= +V
DIG
= +5V
–V
AN
= 0V TO –5V
R
S
≤
50Ω, C
L
= 15pF
–25
0
25
50
75
TEMPERATURE –
°C
100
125
40
5
10
30
–50
–25
0
25
50
75
TEMPERATURE –
°C
100
125
0
–50
0
–50
Figure 5. CMP402 Propagation Delay
vs. Temperature – 5 mV OD
Figure 6. CMP401 Propagation Delay
vs. Temperature – 20 mV OD
Figure 7. CMP402 Propagation Delay
vs. Temperature – 20 mV OD
90
80
+V
AN
= +V
DIG
= +5V
–V
AN
= 0V TO –5V
PROPAGATION DELAY – ns
120
+V
AN
= +V
DIG
= +5V
–V
AN
= 0V TO –5V
T
A
= +25°C
80
70
PROPAGATION DELAY – ns
+V
AN
= +V
DIG
–V
AN
= 0V TO –5V
R
S
≤
50Ω, C
L
= 15pF
T
A
= +25°C
PROPAGATION DELAY – ns
70
60
50
40
30
T
A
= +25°C
100
60
50
40
80
+P
DELAY
60
–P
DELAY
40
+P
DELAY
–P
DELAY
+P
DELAY
30
20
10
0
–P
DELAY
20
10
0
10
1k
10k
100
SOURCE RESISTANCE –
Ω
100k
20
0
10
100
1k
10k
SOURCE RESISTANCE –
Ω
100k
0
2
3
4
5
POSITIVE SUPPLY VOLTAGE – Volts
6
Figure 8. CMP401 Propagation Delay
vs. Source Resistance – 20 mV OD
Figure 9. CMP402 Propagation Delay
vs. Source Resistance – 20 mV OD
Figure 10. CMP401 Propagation Delay
vs. Supply Voltage – 20 mV OD
REV. 0
–5–
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