Nickel Barrier
Multilayer Ceramic Capacitors
Features:
•
Multilayer ceramic chip capacitor.
•
Nickel barrier termination.
•
High performance and reliability.
•
0603, 0805, and 1206 case size.
Rated Voltage
Code
A
B
T
U
Rated Voltage
100
16
25
50
Part Dimension
Dimensions
Length
(L)
1.6 ±0.1
2.0 ±0.2
3.2 ±0.2
1.25 ±0.1
1.60 ±0.2
Width
(W)
Maximum
Thickness
(T)
0.8 ±0.1
1.40
1.52
Minimum
MB
0.20
0.25
Minimum
G
0.40
0.70
1.40
Voltage
(V)
6.3 ~ 50
6.3 ~ 500
6.3 ~ 1000
Type
0603
0805
1206
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27/04/06 V1.0
Nickel Barrier
Multilayer Ceramic Capacitors
Temperature Characteristics Code
Code
C
R
F
Temperature Coefficient
NPO (Class I)
X7R (Class II)
Y5V (Class II)
Operation Temperature
(°C)
-55°C ~ +125
30°C ~ +85
Capacitance Change
0 ±30ppm/°C
±15%
+22% ~ -82%
Capacitance Code
Code
010
1R5
100
101
102
103
222
472
Capacitance
(pF)
1*
1.5
10*
100*
1000*
10000*
2200*
4700*
Tolerance Code
Code
J
K
Z
PS:
·
·
Tolerance
(%)
±5
±10
+80/-20
* -- Two significant digits followed by number of zeros.
Temperature coefficient (T.C.) vs. Proper tolerance applied:
NPO:
For all tolerance
X7R+X5R:
K+M Tolerance
Y5V+Z5U:
M+Z Tolerance
Termination Code
Code
Termination Type
N
Nickel
Packaging Code
Code
Packaging Type
B
Bulk
T
Tape and Reel
Standard Test Conditions
Tests shall, unless otherwise specified, be carried out at 15 to 35°C and RH 45 to 75%.If any doubt and argument has been
encounter in judgement, the final test shall be done at 25 ±2°C, RH45 to 55% and 860 ~ 1060mbar. (Based on JIS standard).
Disposition
If question to the measuring result in judgement, take the capacitor under a specified temperature for 30 minutes at least before
measurement.
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27/04/06 V1.0
Nickel Barrier
Multilayer Ceramic Capacitors
Structure
Ag/Pd Series
Number
1
2
3
4
5
End Terminal
Specifications
Ceramic Dielectric
Internal Electrode
Material
Ceramic
Ag-Pd
Ag layer
Ni layer
Sn-Pb layer or Sn layer
Minimum Termination
Plating Thickness
µ
(µ m)
40
1.5 - 3.5
3-8
BME Series
Number
1
2
3
4
5
Specifications
Ceramic Dielectric
Internal Electrode
End Termination
Material
Ceramic
Ni
Cu layer
Ni layer
Sn-Pb layer or Sn layer
Minimum Termination
Plating Thickness
µ
(µ m)
40
1.5 - 3.5
3-8
Storing Condition And Term
Recommends the storing of products within 6 months at temperature 15 ~ 35°C and humidity 70%RH maximum. If the product stored
over 6 months, please reconfirm its solderability before use.
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27/04/06 V1.0
Nickel Barrier
Multilayer Ceramic Capacitors
Performance
Item
External
Appearance
Performance
No defects which may affect
performance
Test or Inspection Method
Visual inspection and dimension measurement
DC Tested voltage shall be applied for 1 ~ 5 second.
Charge/discharge current shall not exceed 50mA (PS : Ra
- Rated Voltage)
Code
Voltage Proof
Withstand test voltage without insulation
breakdown or other damage
≤200V
250V
500V/630V
≥1KV
1.5Ra
Temperature Coefficient
NPO
X7R/X5R
2.5Ra
2.0Ra
1.5Ra
1.25Ra
-
Y5V
Insulation Resistance
NPO:
100,000MΩ minimum or R x C
≥1000Ω
x
F (Which ever is smaller)
X7R, X5R, Y5V, Z5U:
10,000MΩ minimum or R x C
≥
1000Ω x
F (Which ever is smaller)
Within the specified tolerance
NPO:
≥30pF:
Q
≥
1000
<30pF:
Q
≥
400 + 20C
PS:C: Nominal Capacitance (pF)
X7R, X5R, Y5V, and Z5U : (Maximum
Value)
T.C.
X7R/
X5R
Z5U
Y5V
≥
50V
2.5%
4.0%
5.0%
25V
3.0%
-
7.5%
16V
3.5%
-
≤
10V
5.0%
-
Rated Voltage
<1KV
≥1KV
DC Tested Voltage
1.0 Ra
1KV
Apply DC tested voltage for 60 ±5 minute.
(PS : Ra - Rated Voltage)
Capacitance
(Cap.)
Dissipation Factor (D.F)
Measuring Frequency:
Z5U,Y5V, X7R, X5R : 1KHz ±50Hz
NPO:
>1000pF:1KHz
±50Hz.
≤1000pF:1MHz
100KHz.
Measuring Voltage:
Z5U:0.5Vrms.
NPO:
X7R, X5R, Y5V:1.0 ±0.2Vrms.
9.0% 12.5%
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27/04/06 V1.0
Nickel Barrier
Multilayer Ceramic Capacitors
Item
Performance
Temperatures Coefficient
TC
Operating
Temperature
Capacitance
Change (DC)
0 ±30 (ppm/°C)
±15%
±15%
+22% ~ -82%
+22% ~ -56%
Test or Inspection Method
The temperature coefficient is determined using the
capacitance measured in step 3 as a reference. Test the
specimen from step 1through step 5, the capacitance shall
be within the specified tolerance for the capacitance
coefficient and capacitance change as left table.
Code
1
2
3
4
5
Temperature Coefficient
Base Temperature (25°C) ±2°C
Minimum Operation Temperature ±2°C
Base Temperature (25°C) ±2°C
Minimum Operation Temperature ±2°C
Base Temperature (25°C) ±2°C
NPO -55 ~ +125°C
Temperature
Characteristic
of Capacitance
X7R -55 ~ +125°C
X5R
Z5U
-55 ~ +85°C
-55 ~ +125°C
Y5V -55 ~ +125°C
Solderabiliy
New solder to over 95% of termination
Leaching
External
Appearance
No mechanical Damage
NPO
Capacitance
X7R/X5
Change
R
(∆ C/C)
Z5U
Y5V
Soldering
to heat
±2.5% or ±0.25 pF maximum
(Whichever is larger)
±7.5%
±20%
±20%
Completely soak both terminal electrodes in
solder at specified temperature for 3 ±0.5 second
a. For Tin-Lead Sn/Pb) Termination product:
235 ±5°C.
b. For Lead-free (Pure Sn) Termination
product: 245 ±5°C.
Completely soak both terminal electrodes in solder at 270
±5°C for 40 ±1second.
NPO: C
≥30pF
: Q
≥
1000
C<30pF:Q
≥
400 + 20°C
PS: C : Nominal Capacitance (pF)
X7R, X5R, Y5V, Z5U : (Maximum Value)
≥
50V
2.5%
4.0%
5.0%
≤
10V
Completely immerse both
terminations in solder at 270 ±5°C for 10 ±3 second.
Leave the capacitors in ambient condition for 2 4 ±2 hours
before measurement.
DF
T.C.
X7R/
X5R
Z5U
Y5V
25V
3.0%
-
7.5%
16V
3.5%
-
*Preconditioning: F(only for Class 2):
5.0%
-
Perform a heat treatment at 150 +0-10°C for one hour and
then let sit for 24 ±2 hours at room temperature.
Perform the initial measurement.
9.0% 12.5%
IR
NPO:
100,000MW minimum or R x C
≥1000W
x F (Whichever is smaller)
X7R, X5R, Y5V, Z5U:
10,000MW minimum or R x C
≥1000W
x F (Whichever is smaller)
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27/04/06 V1.0
stm32/stm8
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