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PBSS303ND
60 V, 3 A NPN low V
CEsat
(BISS) transistor
Rev. 02 — 14 December 2007
Product data sheet
1. Product profile
1.1 General description
NPN low V
CEsat
Breakthrough In Small Signal (BISS) transistor in a SOT457 (SC-74)
small Surface-Mounted Device (SMD) plastic package.
PNP complement: PBSS303PD.
1.2 Features
I
I
I
I
I
Low collector-emitter saturation voltage V
CEsat
High collector current capability I
C
and I
CM
High collector current gain (h
FE
) at high I
C
High efficiency due to less heat generation
Smaller required Printed-Circuit Board (PCB) area than for conventional transistors
1.3 Applications
I
I
I
I
I
I
High-voltage DC-to-DC conversion
High-voltage MOSFET gate driving
High-voltage motor control
High-voltage power switches (e.g. motors, fans)
Thin Film Transistor (TFT) backlight inverter
Automotive applications
1.4 Quick reference data
Table 1.
Symbol
V
CEO
I
C
I
CM
R
CEsat
[1]
[2]
Quick reference data
Parameter
collector-emitter voltage
collector current
peak collector current
collector-emitter
saturation resistance
single pulse;
t
p
≤
1 ms
I
C
= 2 A;
I
B
= 200 mA
[2]
Conditions
open base
[1]
Min
-
-
-
-
Typ
-
-
-
68
Max
60
3
6
90
Unit
V
A
A
mΩ
Device mounted on a ceramic PCB, Al
2
O
3
standard footprint.
Pulse test: t
p
≤
300
µs; δ ≤
0.02.
NXP Semiconductors
PBSS303ND
60 V, 3 A NPN low V
CEsat
(BISS) transistor
2. Pinning information
Table 2.
Pin
1
2
3
4
5
6
Pinning
Description
collector
collector
base
emitter
collector
collector
1
2
3
6
5
4
3
4
sym014
Simplified outline
Symbol
1, 2, 5, 6
3. Ordering information
Table 3.
Ordering information
Package
Name
PBSS303ND
SC-74
Description
plastic surface-mounted package (TSOP6); 6 leads
Version
SOT457
Type number
4. Marking
Table 4.
Marking codes
Marking code
AE
Type number
PBSS303ND
PBSS303ND_2
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 02 — 14 December 2007
2 of 16
NXP Semiconductors
PBSS303ND
60 V, 3 A NPN low V
CEsat
(BISS) transistor
5. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
V
CBO
V
CEO
V
EBO
I
C
I
CM
I
B
I
BM
P
tot
Parameter
collector-base voltage
collector-emitter voltage
emitter-base voltage
collector current
peak collector current
base current
peak base current
total power dissipation
single pulse;
t
p
≤
1 ms
T
amb
≤
25
°C
[1]
[3]
[4]
[2]
[1][5]
Conditions
open emitter
open base
open collector
[1]
[2]
Min
-
-
-
-
-
-
-
-
-
-
-
-
-
-
−65
−65
Max
60
60
5
1
3
6
0.8
2
360
600
750
1.1
2.5
150
+150
+150
Unit
V
V
V
A
A
A
A
A
mW
mW
mW
W
W
°C
°C
°C
single pulse;
t
p
≤
1 ms
T
j
T
amb
T
stg
[1]
[2]
[3]
[4]
[5]
junction temperature
ambient temperature
storage temperature
Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
Device mounted on a ceramic PCB, Al
2
O
3
, standard footprint.
Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm
2
.
Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 6 cm
2
.
Pulse test: t
p
≤
10 ms;
δ ≤
10 %.
PBSS303ND_2
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 02 — 14 December 2007
3 of 16
NXP Semiconductors
PBSS303ND
60 V, 3 A NPN low V
CEsat
(BISS) transistor
1600
P
tot
(mW)
1200
(1)
006aaa270
800
(2)
(3)
400
(4)
0
−75
−25
25
75
125
175
T
amb
(°C)
(1) Ceramic PCB, Al
2
O
3
, standard footprint
(2) FR4 PCB, mounting pad for collector 6 cm
2
(3) FR4 PCB, mounting pad for collector 1 cm
2
(4) FR4 PCB, standard footprint
Fig 1. Power derating curves
6. Thermal characteristics
Table 6.
Symbol
R
th(j-a)
Thermal characteristics
Parameter
thermal resistance from
junction to ambient
Conditions
in free air
[1]
[2]
[3]
[4]
[1][5]
Min
-
-
-
-
-
-
Typ
-
-
-
-
-
-
Max
350
208
167
113
50
45
Unit
K/W
K/W
K/W
K/W
K/W
K/W
R
th(j-sp)
[1]
[2]
[3]
[4]
[5]
thermal resistance from
junction to solder point
Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm
2
.
Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 6 cm
2
.
Device mounted on a ceramic PCB, Al
2
O
3
, standard footprint.
Pulse test: t
p
≤
10 ms;
δ ≤
10 %.
PBSS303ND_2
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 02 — 14 December 2007
4 of 16
stm32/stm8
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